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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

AD7866(Rev0) 데이터 시트보기 (PDF) - Analog Devices

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AD7866 Datasheet PDF : 20 Pages
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AD7866
analog input range will be 0 V to VREF and the output coding
from the part will be straight binary (for the next conversion). If this
pin is at a logic high when CS goes low, then the analog input
range will be 2 × VREF and the output coding for the part will
be two’s complement. However, if after the falling edge of CS,
the logic level of the RANGE pin has changed upon the eighth
falling SCLK edge, point B, the output coding will change to the
other option without any change in the analog input range. So for
the next conversion, two’s complement output coding could be selected
with a 0 V to VREF input range, for example, if the RANGE pin
is low upon the falling edge of CS and high upon the eighth falling
SCLK edge, as shown in Figure 7. Figures 5 through 8 show
examples of timing diagrams when selecting a particular analog input
range with a particular output coding format. Table I also summarizes
the required logic level of the RANGE pin for each selection.
The Logic Input A0 is used to select the pair of channels to be
converted simultaneously. The Logic state of this pin is also
checked upon the falling edge of CS and the multiplexers are set
up for the next conversion. If it is low, the following conversion
will be performed on Channel 1 of each ADC; if it is high,
the following conversion will be performed on Channel 2 of
each ADC.
Handling Bipolar Input Signals
Figure 9 shows how useful the combination of the 2 × VREF input
range and the two’s complement output coding scheme is for
handling bipolar input signals. If the bipolar input signal is biased
about VREF and two’s complement output coding is selected,
then VREF becomes the zero code point, –VREF is negative full-
scale and +VREF becomes positive full-scale, with a dynamic
range of 2 × VREF.
Transfer Functions
The designed code transitions occur at successive integer LSB
values (i.e., 1 LSB, 2 LSBs, etc.). The LSB size is = VREF/4096.
The ideal transfer characteristic for the AD7866 when straight
binary coding is selected is shown in Figure 10 and the ideal
transfer characteristic for the AD7866 when two’s complement
coding is selected is shown in Figure 11.
Table I. Analog Input and Output Coding Selection
Range Level
@ Point A1
Range Level
@ Point B2
Low
High
Low
High
Low
High
High
Low
NOTES
1Point A = Falling edge of CS.
2Point B = Eighth falling edge of SCLK.
3Selected for NEXT conversion.
Input Range3
0 V to VREF
VREF ± VREF
VREF /2 ± VREF /2
0 V to 2 × VREF
Output Coding3
Straight Binary
Two’s Complement
Two’s Complement
Straight Binary
A
B
CS
0V TO VREF
INPUT RANGE
1
8
16
1
16
SCLK
RANGE
DOUTA
DOUTB
STRAIGHT BINARY
Figure 5. Selecting 0 V to VREF Input Range with Straight Binary Output Coding
REV. 0
A
B
CS
VREF ؎ VREF
INPUT RANGE
1
8
16
1
16
SCLK
RANGE
DOUTA
DOUTB
TWOS COMPLEMENT
Figure 6. Selecting VREF ± VREF Input Range with Two’s Complement Output Coding
–11–

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