AD7841AS 데이터 시트보기 (PDF) - Analog Devices
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AD7841AS Datasheet PDF : 12 Pages
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2
VDD = +15V
VSS = –15V
1 VREF(+) = +5V
VREF(–) = –5V
TA = 25؇C
0
–1
–2
0
2048 4096 6144 8192 10240 12288 14336 16384
CODE
Figure 2. Typical INL Plot
Typical Performance Characteristics– AD7841
1
0.75
0.5
0.25
0
–0.25
–0.5
–0.75
VDD = +15V
VSS = –15V
VREF(+) = +5V
VREF(–) = –5V
TA = 25؇C
–1
0 2048 4096 6144 8192 10240 12288 14336 16384
CODE
Figure 3. Typical DNL Plot
4
VDD = +15V
VSS = –15V
VREF(+) = +5V
2
VREF(–) = –5V
0
–2
–1
–40 –20
0 20 40 60
TEMPERATURE – ؇C
80 100
Figure 4. Typical INL Error vs.
Temperature
1
0.5
VDD = +15V
VSS = –15V
VREF(+) = +5V
0 VREF(+) = –5V
–0.5
–1–40 –20
0 20 40 60
TEMPERATURE – ؇C
80 100
Figure 5. Typical DNL Error vs.
Temperature
4
VDD = +15V
VSS = –15V
2
VREF(+) = +5V
VREF(–) = –5V
ZERO-SCALE ERROR
0
–2
FULL-SCALE ERROR
–4
–40 –20
0 20 40 60
TEMPERATURE – ؇C
80 100
Figure 6. Zero-Scale and Full-Scale
Error vs. Temperature
6
5
4
DIGITAL INPUTS @
3 THRESHOLDS
VCC = +5V
VDD = +15V
VSS = –15V
2
1
DIGITAL INPUTS @ SUPPLIES
0
–1
–40 –20 0
20 40 60 80 100
TEMPERATURE – ؇C
Figure 7. ICC vs. Temperature
0.6
0.5
0.4
0.3
0.2
0.1
0
–0.1
–0.2
0 500 1000 1500 2000 2500 3000 3500 4000 4500 5000
Figure 8. Typical Digital-to-Analog
Glitch Impulse
10.19
10.18
10.17
10.16
27 28 29 30 31 32 33
SETTLING TIME – s
Figure 9. Settling Time (+)
10
VDD = +15V
VSS = –15V
VCC = +5V
8
IDD
ISS
6
4
–40 –20
0 20 40 60
TEMPERATURE – °C
80 100
Figure 10. IDD, ISS vs. Temperature
REV. 0
–7–
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