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PBA31308V2.02SLJYU 데이터 시트보기 (PDF) - Unspecified

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PBA31308V2.02SLJYU
ETC
Unspecified ETC
PBA31308V2.02SLJYU Datasheet PDF : 39 Pages
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Intel Public
UniStone
PBA 31308
General Device Overview
Table 1 Pin Description
Pin Symbol
No.
Input /
Output
Supply Voltage During After
Reset Reset
Function
E4 P0.0/
PCMFR1
I/O/OD
VDDPCM
PD
PD
Port 0.0 or
PCM frame signal 1
E5 P0.1/
PCMCLK
I/O/OD
VDDPCM
PD
PD
Port 0.1 or
PCM clock
E6 P0.5/
UARTRXD
F2 P1.2/
TDI/
RF_ACTIVE
I/O/OD
I/O/OD
VDDUART
Internal2
Z
PU1)
Z
PU1)
Port 0.5 or
UART receive data
Port 1.2 or
JTAG interface or
WLAN coexistence interface
F3 P0.11/
I/O/OD
Internal2
Z
Z
TX_CONF
Port 0.11or
WLAN coexistence interface
F4 P0.14/
I/O
TX_CONF
VDDUART
Z
Z
Port 0.14 or
WLAN coexistence interface
F5 P0.7/
I/O/OD
VDDUART
Z
Z
UARTCTS
Port 0.7 or
UART CTS flow control
F7 P0.4/
UARTTXD
I/O/OD
VDDUART
PU
PU
Port 0.4 or
UART transmit data
F8 P0.6/
UARTRTS
I/O/OD
VDDUART
PU
PU
Port 0.6 or
UART RTS flow control
A4, VSUPPLY
SI
A5,
A6
-
-
Power supply
C1 VREG
SO
-
-
Regulated Power supply
F6 VDDUART
SI
-
-
UART interface Power supply
C5 VDDPCM
SI
-
-
PCM interface Power supply
A1, VSS
-
-
Ground
A7,
A9,
C8,
C9,
D7,
D8,
E8,
E9,
F1,
F9
1) Fixed pull-up/pull-down if JTAG interface is selected, not affected by any chip reset. If JTAG interface is not selected the
port is tristate.
Product Overview
11
Revision 1.2, 2009-02-17

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