W83195BG-118 데이터 시트보기 (PDF) - Winbond

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W83195BG-118

Clock Generator

Winbond 

W83195BR-118/W83195BG-118

STEPLESS FOR INTEL 915/945 CHIPSETS

7.17 Register 16: Skew Control (Default: E4h)

BIT

NAME PWD

DESCRIPTION

7 INV_PCIE 1 Invert the PCIE phase, 1: Default, 0: Inverse

6

INV_PCI 1 Invert the PCI phase, 1: Default, 0: Inverse

5 CSKEW [2] 1 CPU1 to CPU0 skew control, Skew resolution is 300ps

4 CSKEW [1] 0 The decision of skew direction is same as CSKEW<2:0> setting

3 CSKEW [0] 0

2 PSKEW [2] 1 CPU1 to PCI skew control, Skew resolution is 300ps

1 PSKEW [1] 0 The decision of skew direction is same as PSKEW [2:0] setting

0 PSKEW [0] 0

TYPE

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

7.18 Register 17: Slew rate Control (Default: 00h)

BIT

NAME

PWD

DESCRIPTION

7

Reserved

X Reserved

6 INV_48MHz 0 Invert the 48MHz phase, 0: In phase with 24_48MHz

1: 180 degrees out of phase

5 PCI_F0_S2 0 PCI_F0 slew rate control

4 PCI_F0_S1 0 11 : Strong , 00 : Weak , 10/01 : Normal

3

Reserved

0 Reserved

2

Reserved

0 Reserved

1

Reserved

0 Reserved

0

Reserved

0 Reserved

TYPE

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

7.19 Register 18: Reserved (Default: 00h)

7.20 Register 19: Skew Control (Default: DAh)

BIT

NAME

PWD

DESCRIPTION

TYPE

7

Reserved

1 Reserved

R/W

6

Reserved

1 Reserved

R/W

5 PCIESKEW<2> 0 CPU1 to PCIE skew control

R/W

4 PCIESKEW<1> 1 Skew resolution is 300ps

R/W

3 PCIESKEW<0> 1 The decision of skew direction is same as PCIESKEW<2:0> R/W

setting

2

Reserved

0 Reserved

R/W

1

Reserved

1 Reserved

R/W

0

Reserved

0 Reserved

R/W

- 15 -

Publication Release Date: May 2006

Revision 0.81

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