TC58NVG0S3AFT05 데이터 시트보기 (PDF) - Toshiba

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TC58NVG0S3AFT05

TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

Toshiba 

BLOCK DIAGRAM

I/O1

to

I/O8

CE

CLE

ALE

WE

RE

WP

RY / BY

I/O

Control

circuit

Logic

control

RY / BY

Status register

Address register

Command register

Control

circuit

TC58NVG0S3AFT05

VCC VSS

Column buffer

Column decoder

Data register

Sense amp

Memory

cell array

HV generator

ABSOLUTE MAXIMUM RATINGS

SYMBOL

RATING

VCC

VIN

VI/O

PD

TSOLDER

TSTG

TOPR

Power Supply Voltage

Input Voltage

Input /Output Voltage

Power Dissipation

Soldering Temperature (10 s)

Storage Temperature

Operating Temperature

VALUE

−0.6 to 4.6

−0.6 to 4.6

−0.6 V to VCC + 0.3 V (≤ 4.6 V)

0.3

260

−55 to 150

0 to 70

CAPACITANCE *(Ta = 25°C, f = 1 MHz)

SYMB0L

PARAMETER

CONDITION

MIN

CIN

Input

VIN = 0 V



COUT

Output

VOUT = 0 V



* This parameter is periodically sampled and is not tested for every device.

MAX

10

10

UNIT

V

V

V

W

°C

°C

°C

UNIT

pF

pF

2003-08-20A 2/33

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