ST7585 데이터 시트보기 (PDF) - Sitronix Technology Co., Ltd.
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ST7585 Datasheet PDF : 51 Pages
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ST7585
Built-in Power System Pins
Pin Name
Type
Description
V0O
V0I
V0S
Power
LCD driving voltage for commons at negative frame.
V0 ≥ VG > VM > VSS ≥ XV0
V0O, V0I & V0S should be separated in ITO layout.
V0O, V0I & V0S should be connected together in FPC layout.
XV0O
LCD driving voltage for commons at positive frame.
XV0I
Power XV0O, XV0I & XV0S should be separated in ITO layout.
XV0S
XV0O, XV0I & XV0S should be connected together in FPC layout.
VGO
VGI
VGS
Power
LCD driving voltage for segments.
VGO, VGI & VGS should be separated in ITO layout.
VGO, VGI & VGS should be connected together in FPC layout.
1.8 ≤ VG < VDD2.
Bias circuit configuration pin for default setting : “L”=1/7; “H”=1/9.
BR
I
This pin sets the default bias ratio after reset.
Microprocessor Interface Pins
Pin Name
Type
Description
PS[2:0]
Microprocessor interface select pins.
PS2
PS1
PS0
Selected Interface
“L”
“L”
“L” 3-Line SPI interface
I
“L”
“L”
“H” 4-Line SPI interface
“L”
“H”
“L” 6800-series parallel interface
“L”
“H”
“H” 8080-series parallel interface
“H”
“L”
“L” I2C Interface
CSB
RESB
A0
RWR
Chip select input pin.
Interface access is enabled when CSB is “L”.
I
When CSB is non-active (CSB=“H”), D[7:0] pins are high impedance.
CSB is not used in serial interfaces and should fix to “H” by VDD1.
Reset input pin.
I
When RESB is “L”, internal initialization is executed.
It determines whether the access is related to data or command.
A0=“H” : Indicates that D[7:0] are display data.
I
A0=“L” : Indicates that D[7:0] are control data.
A0 is not used in serial interfaces and should fix to “H” by VDD1.
Read/Write execution control pin. When parallel interface is selected:
MPU Type
RWR
Description
Read/Write control input pin.
6800 series
R/W R/W=“H”: read.
I
R/W=“L”: write.
Write enable input pin.
8080 series
/WR Signals on D[7:0] will be latched at the
rising edge of /WR signal.
RWR is not used in serial interfaces and should fix to “H” by VDD1.
No. of Pins
2
4
1
2
4
1
2
4
1
1
No. of Pins
3
1
1
1
1
Ver 1.0c
8/51
2009/04/14
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