1 General Description
SSD1805 is a single-chip CMOS LCD driver with controller for dot-matrix graphic liquid crystal display system.
SSD1805 consists of 200 high-voltage driving output pins for driving maximum 132 Segments, 68 Commons /
132 Segments, 64 Commons and 1 icon-driving Common / 132 Segments, 54 Commons and 1 icon-driving
Common / 132 Segments, 32 Commons and 1 icon-driving Common. SSD1805 can also be switched among
32, 54, 64 or 68 display multiplex ratios by hardware pin selection.
SSD1805 consists of 132 x 68 bits Graphic Display Data RAM (GDDRAM). Data/Commands are sent from
common MCU through 8-bit 6800-series / 8080-series compatible Parallel Interface or 4-wires Serial
Peripheral Interface by software program selections.
SSD1805 embeds DC-DC Converter, On-Chip Oscillator and Bias Divider to reduce the number of external
components. With the advance design, low power consumption, stable LCD operating voltage and flexible die
package layout, SSD1805 is suitable for any portable battery-driven applications requiring long operation
period with compact size.
2 FEATURES
• Power Supply: VDD = 1.8V – 3.6V
VDDIO = 1.8V – 3.6V
VCI = 1.8V – 3.6V
• LCD Driving Output Voltage: VLCD = +12.5V
• Low Current Sleep Mode
• Pin selectable 68/64/54/32 multiplex ratio configuration. Maximum display size:
o 132 columns by 68 rows
o 132 columns by 64 rows with one icon line
o 132 columns by 54 rows with one icon line
o 132 columns by 32 rows with one icon line
• 8-bit 6800-series / 8080-series Parallel Interface, 4-wires Serial Peripheral Interface
• On-Chip 132 X 68 = 8976 bits Graphic Display Data RAM
• Column Re-mapping and RAM Page scan direction control
• Vertical Scrolling by Common
• On-Chip Voltage Generator or External LCD Driving Power Supply Selectable
• Pin selectable 2X/3X/4X/5X On-Chip DC-DC Converter with internal flying capacitors.
• 64 Levels Internal Contrast Control
• Programmable LCD Driving Voltage Temperature Compensation Coefficients
• On-Chip Bias Divider with internal compensation capacitors (except VOUT)
• Programmable multiplex ratio: 1/9 to 1/68
• Programmable bias ratio: 1/4, 1/5, 1/6, 1/7, 1/8, 1/9
• Display Offset Control
• Non-Volatile Memory (OTP) for calibration
3 ORDERING INFORMATION
Ordering Part Number
SSD1805Z
SSD1805TR1
SEG
132
132
COM
64/54/32 +
1 icon or
68
64 + 1 icon
Package Form
Gold Bump Die
TAB
Reference
Figure 2 on
Page 7
Figure 20 on
page 50
Table 1 - Ordering Information
Remark
-
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SSD1805 Series Rev 1.1 P 5/52 Jun 2004
Solomon Systech