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RC5057

High Performance Programmable Synchronous DC-DC Controller for Low Voltage Microprocessors

Fairchild Semiconductor 

RC5057

PRODUCT SPECIFICATION

Electrical Specifications (VCCA = 5V, VCCP = 12V, VOUT = 2.0V, and TA = +25°C using circuit in Figure 1,

unless otherwise noted.)

The • denotes specifications which apply over the full operating temperature range.

Parameter

Output Voltage

Output Current

Initial Voltage Setpoint

Output Temperature Drift

Line Regulation

Internal Droop3

Output Ripple

Total Output Variation,

Steady State1

Total Output Variation,

Transient2

Short Circuit Detect Current

Efficiency

Output Driver Rise & Fall Time

Output Driver Deadtime

Oscillator Frequency

Duty Cycle

PWRGD Threshold

VCCA UVLO

VCCP UVLO

VCCA Supply Current

VCCP Supply Current4

Soft Start Current

Conditions

See Table 1

ILOAD = 0.8A, VOUT = 2.400V

VOUT = 2.000V

VOUT = 1.550V

TA = 0 to 70°C, VOUT = 2.000V

VOUT = 1.550V

VCCA = 4.75V to 5.25V, VOUT = 2.000V

VOUT at ILOAD = 0.8A to Imax

20MHz BW, ILOAD = Imax

VOUT = 2.000V

VOUT = 1.550V3

ILOAD = 0.8A to Imax,VOUT = 2.000V

VOUT = 1.550V3

ILOAD = Imax, VOUT = 2.0V

See Figure 4 for tR and tF

See Figure 7 for tDT

Logic HIGH

Logic LOW

Min. Typ. Max. Units

• 1.3

3.5

V

18

A

2.394 2.424 2.454 V

2.000 2.020 2.040 V

1.550 1.565 1.580 V

•

+8

mV

•

+6

mV

•

±2

mV

-44 -40 -36 mV

11

mVpk

• 1.940

• 1.480

2.070 V

1.590

• 1.900

• 1.480

2.100 V

1.590

• 45

60

µA

85

%

50

nsec

50

nsec

• 255 300 345 kHz

0

100 %

• 93

• 88

107 %Vout

112

• 3.74 4 4.26 V

• 7.65 8.5 9.35 V

19

mA

40

mA

•5

10

17

µA

Notes:

1. Steady State Voltage Regulation includes Initial Voltage Setpoint, Droop, Output Ripple and Output Temperature Drift and is

measured at the converter’s VFB sense point.

2. As measured at the converter’s VFB sense point. For motherboard applications, the PCB layout should exhibit no more than

0.5mΩ trace resistance between the converter’s output capacitors and the CPU. Remote sensing should be used for optimal

performance.

3. Using the VFB pin for remote sensing of the converter’s output at the load, the converter will be in compliance with Intel’s

VRM 8.4 specification of +50, -80mV. If Intel specifications on maximum plane resistance from the converter’s output capac-

itors to the CPU are met, the specification of +40, -70mV at the capacitors will also be met.

4. Includes gate current.

4

REV. 1.2.0 2/10/00

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