MV1442DPAS 데이터 시트보기 (PDF) - Zarlink Semiconductor Inc
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MV1442DPAS Datasheet PDF : 12 Pages
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MV1442
HDB3 Encoder/Decoder/Clock Regenerator
The MV1442, along with other devices in the Zarlink 2Mbit
PCM signalling series comprise a group of circuits which will
perform the common channel signalling and error detection
functions for a 2.048Mbit PCM transmission link operating in
accordance with the appropriate CCITT recommendations.
The circuits are fabricated in CMOS and operate from a
single +5V supply with all inputs and outputs being TTL
compatible.
The MV1442 is an encoder/decoder for the HDB3 pseudo-
ternary transmission code, described in Annex A of CCITT
Recommendation G.703. The device encodes and decodes
simultaneously and asynchronously. Error monitoring
functions are provided to detect violations of the HDB3
coding, all ones detection and loss of input (all zeros detection)
In addition a loop back function is provided for terminal
testing. The MV1442 may be selected to function in either
internal or external clock recovery modes. Internal clock
recovery mode may be selected tor either 1.544MHz or
2.048MHz operation and in this mode an external 16.384MHz
crystal (12.352MHz for 1.544MHz operation) is required.
External clock recovery mode may be selected for 1.544MHz,
2.048MHz or 8.448MHz operation.
Features
• On-chip Digital Clock Regenerator
• HDB3 Encoding and Decoding to CCITT
Recommendation G.703
• Asynchronous Operation
• Simultaneous Encoding and Decoding
• Clock Recovery Signal allows Off-chip Clock
Regeneration
• Loop Back Control
• HDB3 Error Monitor
• ‘All Ones’ Error Monitor
• Loss of Input Alarm
• Low Power Operation
• 2.048MHz or 1.544MHz Operation in External or
Internal Clock Recovery mode
• 8.448MHz Operation in External Clock Recovery
mode
DS3077
ISSUE 4.0
July 2001
Ordering Information
MV1442/IG/DPAS DIL plastic package
MV1442/IG/MPES Miniature plastic package
MV1442/IG/MPEG Miniature plastic (tape and reel)
NRZ DATA IN 1
ENCODER CLOCK 2
LOSS OF INPUT 3
NRZ DATA OUT 4
DECODER CLOCK 5
RESET AIS 6
AIS 7
MODE 8
GND 9
18 VDD
17 TXD2
16 TXD1
15 RXD2
14 LOOP TEST ENABLE
13 RXD1
12 CRYSTAL OUT/CDR
11 DOUBLE VIOLATION
10 CRYSTAL IN
DP18
NRZ DATA IN
ENCODER CLOCK
LOSS OF INPUT
NRZ DATA OUT
DECODER CLOCK
RESET AIS
AIS
MODE
GND
1
18
2
17
3
16
4
15
5
14
6
13
7
12
8
11
9
10
VDD
TXD2
TXD1
RXD2
LOOP TEST ENABLE
RXD1
CRYSTAL OUT/CDR
DOUBLE VIOLATION
CRYSTAL IN
MP18
(WIDE BODY)
Figure 1 - Pin connections – top view
Absolute Maximum Ratings
VDD
Inputs
Outputs
Storage temperature
-0.5V to +7V
VDD -0.5V to GND -0.5V
VDD -0.5V to GND -0.5V
-55°C to +125°C
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