MSM7584D 데이터 시트보기 (PDF) - Oki Electric Industry
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MSM7584D Datasheet PDF : 58 Pages
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¡ Semiconductor
FEDL7584D-02
MSM7584D
AFC/RCW
AFC operation and clock regeneration range specification signal input.
As shown in Figure 5, AFC information is reset when AFC/RCW and RPR go to "1" level. The
AFC operation starts after a certain time elapses.
The average number of AFC operation times is small when RPR is at "1" level.
The average number of AFC operation times is large when RPR is at "0" level.
If AFC/RCW is at "0" level, DPLL will not adjust the phase.
(CASE1)
AFC/RCW
RPR
(CASE2)
AFC/RCW
RPR
AFC information
is reset.
Averag number of
AFC operation
times is small.
Average number of AFC
operation times is large.
The clock generation circuit
starts with the previous
AFC information.
"0"
Average number of AFC
operation times is large.
AFC information
is maintained.
AFC information
is maintained.
Figure 5 AFC Control Timing Diagram
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