MCP40D17-103AE 데이터 시트보기 (PDF) - Microchip Technology

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MCP40D17-103AE

7-Bit Single I2C™ (with Command Code) Digital POT with Volatile Memory in SC70

Microchip Technology 

MCP40D17/18/19

1.1 I2C Mode Timing Waveforms and Requirements

SCL

SDA

91

90

93

92

FIGURE 1-1:

START

Condition

I2C Bus Start/Stop Bits Timing Waveforms.

STOP

Condition

TABLE 1-1: I2C BUS START/STOP BITS REQUIREMENTS

I2C AC Characteristics

Standard Operating Conditions (unless otherwise specified)

Operating Temperature

–40°C ≤ TA ≤ +125°C (Extended)

Operating Voltage VDD range is described in Section 2.0 “Typical

Performance Curves”

Param.

No.

Symbol

Characteristic

FSCL

D102

90

91

92

93

Cb Bus capacitive

loading

TSU:STA

THD:STA

TSU:STO

THD:STO

START condition

Setup time

START condition

Hold time

STOP condition

Setup time

STOP condition

Hold time

Standard Mode

Fast Mode

100 kHz mode

400 kHz mode

100 kHz mode

400 kHz mode

100 kHz mode

400 kHz mode

100 kHz mode

400 kHz mode

100 kHz mode

400 kHz mode

Min

0

0

—

—

4700

600

4000

600

4000

600

4000

600

Max Units

Conditions

100 kHz Cb = 400 pF, 1.8V - 5.5V

400 kHz Cb = 400 pF, 2.7V - 5.5V

400 pF

400 pF

—

ns Only relevant for repeated

—

ns START condition

—

ns After this period the first

—

ns clock pulse is generated

—

ns

—

ns

—

ns

—

ns

SCL

SDA

In

SDA

Out

103

90

91

109

100

101

106

107

109

Note 1: Refer to specification D102 (Cb) for load conditions.

FIGURE 1-2:

I2C Bus Data Timing.

© 2009 Microchip Technology Inc.

102

92

110

DS22152B-page 9

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