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MCP3911

3.3V Two-Channel Analog Front End

Microchip Technology 

MCP3911

1.0 ELECTRICAL

CHARACTERISTICS

ABSOLUTE MAXIMUM RATINGS †

VDD ..................................................................... -0.3V to 4.0V

Digital inputs and outputs w.r.t. AGND................ --0.3V to 4.0V

Analog input w.r.t. AGND ..................................... ....-2V to +2V

VREF input w.r.t. AGND ............................... -0.6V to VDD +0.6V

Storage temperature .....................................-65°C to +150°C

Ambient temp. with power applied ................-65°C to +125°C

Soldering temperature of leads (10 seconds) ............. +300°C

ESD on the analog inputs (HBM,MM) .................4.0 kV, 300V

ESD on all other pins (HBM,MM) ........................4.0 kV, 300V

† Notice: Stresses above those listed under “Absolute

Maximum Ratings” may cause permanent damage to

the device. This is a stress rating only and functional

operation of the device at those or any other

conditions, above those indicated in the operational

listings of this specification, is not implied. Exposure to

maximum rating conditions for extended periods may

affect device reliability.

1.1 Electrical Specifications

TABLE 1-1: ANALOG SPECIFICATIONS TARGET TABLE

Electrical Specifications: Unless otherwise indicated, all parameters apply at AVDD = DVDD = 2.7V to 3.6V, MCLK = 4 MHz;

PRE<1:0> = 00; OSR = 256; GAIN = 1; VREFEXT = 0, CLKEXT = 1, AZ_FREQ = 0, DITHER<1:0> = 11, BOOST<1:0> = 10;

VCM = 0V; TA = -40°C to +125°C; VIN = 1.2VPP = 424 mVRMS at 50/60 Hz on both channels.

Characteristic

Sym

Min

Typ

Max

Units

Conditions

ADC Performance

Resolution (No Missing

Codes)

24

—

Sampling Frequency

fS(DMCLK)

—

1

Output Data Rate

fD(DRCLK)

—

4

Analog Input

Absolute Voltage on

CH0+, CH0-, CH1+,

CH1- pins

Analog Input

Leakage Current

Differential Input

Voltage Range

Offset Error

Offset Error Drift

Gain Error

Gain Error Drift

CH0+/-

-1

IIN

—

±1

(CHn+ - CHn-) -600/GAIN —

VOS

-1

0.2

—

0.5

GE

-4

—

—

1

—

bits OSR = 256 or greater

4

MHz For maximum condition,

BOOST<1:0> = 11

125

ksps For maximum condition,

BOOST<1:0> = 11,

OSR = 32

+1

V All analog input channels,

measured to AGND

—

+600/

GAIN

+1

—

+4

—

nA RESET<1:0> = 11,

MCLK running continuously

mV VREF = 1.2V,

proportional to VREF

mV Note 4

µV/°C

% Note 4

ppm/°C

Note 1:

2:

3:

4:

5:

6:

This specification implies that the ADC output is valid over this entire differential range and that there is no distortion or

instability across this input range. Dynamic Performance specified at -0.5 dB below the maximum signal range,

VIN = 1.2VPP = 424 mVRMS, VREF = 1.2V at 50/60 Hz. See Section 4.0, Terminologies And Formulas for definition.

This parameter is established by characterization and not 100% tested. See performance graphs for other than default

settings provided here.

For these operating currents, the following configuration bit settings apply: SHUTDOWN<1:0> = 00,

RESET<1:0> = 00, VREFEXT = 0, CLKEXT = 0.

For these operating currents, the following configuration bit settings apply: SHUTDOWN<1:0> = 11, VREFEXT = 1,

CLKEXT = 1.

Applies to all gains. Offset and gain errors depend on PGA gain setting, see Section 2.0, Typical Performance

Curves for typical performance.

Outside of this range, the ADC accuracy is not specified. An extended input range of ±2 V can be applied continuously

to the part with no damage.

For proper operation and optimizing ADC accuracy, AMCLK should be limited to the maximum frequency defined in

Table 5-2 as a function of the BOOST and PGA settings chosen. MCLK can take larger values as long as the prescaler

settings (PRE<1:0>) limit AMCLK = MCLK/PRESCALE in the defined range in Table 5-2.

 2012-2013 Microchip Technology Inc.

DS20002286C-page 3

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