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MAX1980

Quick-PWM Slave Controller with Driver Disable for Multiphase DC-DC Converter

Maxim Integrated 

Quick-PWM Slave Controller with

Driver Disable for Multiphase DC-DC Converter

(VIN < ηVOUT), the input currents of the overlapping

phases may sum together, increasing the total input

and output ripple voltage and RMS ripple current.

During in-phase operation, the input capacitors must

support large, instantaneous input currents when the

high-side MOSFETs turn on simultaneously, resulting in

increased ripple voltage and current when compared

to out-of-phase operation. The higher RMS ripple cur-

rent degrades efficiency due to power loss associated

with the input capacitor’s effective series resistance

(ESR). This typically requires a large number of low-

ESR input capacitors in parallel to meet input ripple

current ratings or minimize ESR-related losses.

The polarity select input (POL) determines whether ris-

ing edges (POL = VCC) or falling edges (POL = GND)

trigger a new cycle. For low duty-cycle applications

(duty factor < 50%), triggering on the rising edge of the

master’s low-side gate driver prevents both high-side

MOSFETs from turning on at the same time. Staggering

the phases in this way lowers the input ripple current,

thereby reducing the input capacitor requirements. For

applications operating with approximately a 50% duty

factor, out-of-phase operation (POL = VCC) causes the

slave controller to complete an on-pulse coincident to

the master controller determining when to initiate its

next on time. The noise generated when the slave con-

troller turns off its high-side MOSFET could compro-

mise the master controller’s feedback voltage and

current-sense inputs, causing inaccurate decisions that

lead to more jitter in the switching waveforms. Under

these conditions, triggering off of the falling edge (POL

= GND) of the master’s low-side gate driver forces the

controllers to operate in-phase, improving the system’s

noise immunity.

5V Bias Supply (VCC and VDD)

The MAX1980 requires an external 5V bias supply in

addition to the battery. Typically this 5V bias supply is

the notebook’s 95% efficient 5V system supply.

Keeping the bias supply external to the IC improves

efficiency, eliminates power dissipation limitations, and

removes the cost associated with the internal, 5V linear

regulator that would otherwise be needed to supply the

PWM circuit and gate drivers. If standalone capability is

needed, the 5V supply can be generated with an exter-

nal linear regulator.

The MAX1980 has a separate analog PWM supply volt-

age input (VCC) and gate-driver supply input (VDD).

The battery input (V+) and 5V bias inputs (VCC and

VDD) can be tied together if the input source is a fixed

4.5V to 5.5V supply.

The maximum current required from the 5V bias supply

to power VCC (PWM controller) and VDD (gate-drive

power) is:

IBIAS = ICC + fSW(QG1 + QG2) = 10mA to 45mA (typ)

where ICC is 525µA typical, fSW is the switching

frequency, and QG1 and QG2 are the MOSFET data

sheets’ total gate-charge specification limits at

VGS = 5V.

Driver Disable

When DD is driven low, the MAX1980 disables the dri-

vers by forcing DL and DH low, effectively disabling the

slave controller. Disabling the MAX1980 for single-

phase operation allows the master controller to enter

low-power pulse-skipping operation under light load

conditions.

When DD is driven high, the MAX1980 enables the dri-

vers, allowing normal PWM operation (see the On-time

Control and Active Current Balancing section). Since

the slave controller cannot skip pulses, the master con-

troller should be configured for forced-PWM operation

while the MAX1980’s drivers are enabled. This PWM

control scheme forces the low-side gate drive wave-

form to be the complement of the high-side gate drive

waveform, allowing the inductor current to reverse.

During negative load and downward output-voltage

transitions, forced-PWM operation allows the converter

to sink current, rapidly pulling down the output voltage.

Another benefit of forced-PWM operation, the switching

frequency remains relatively constant over the full load

and input voltage ranges.

Standby Mode

The MAX1980 slave controller enters a low-power

standby mode when the ILIM voltage (VILIM) drops

below 250mV (Table 4). Standby forces DL and DH

low, and disables the PWM controller to inhibit switch-

ing; however, the bias and fault-protection circuitry

remain active so the MAX1980 can continuously moni-

tor the ILIM input. When VILIM is driven above 250mV,

the PWM controller is enabled.

Table 3. Approximate K-Factor Errors

TON

CONNECTION

FREQUENCY

SETTING

(kHz)

K-FACTOR

(µs)

MAX

K-FACTOR

ERROR

(%)

VCC

200

5

10

Float

300

3.3

10

GND

550

1.8

10

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