M38504M6-200FP 데이터 시트보기 (PDF) - MITSUBISHI ELECTRIC
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M38504M6-200FP Datasheet PDF : 86 Pages
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MITSUBISHI MICROCOMPUTERS
3850 Group (Spec. H)
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Flash Memory Mode
The M38507F8 (flash memory version) has an internal new DINOR
(DIvided bit line NOR) flash memory that can be rewritten with a
single power source when VCC is 5 V, and 2 power sources when
VCC is 3.3 V.
For this flash memory , three flash memory modes are available in
which to read, program, and erase: parallel I/O and standard serial I/
O modes in which the flash memory can be manipulated using a
programmer and a CPU rewrite mode in which the flash memory can
be manipulated by the Central Processing Unit (CPU). Each mode is
detailed in the pages to follow.
The flash memory of the M38507F8 is divided into User ROM area
and Boot ROM area as shown in Figure 44.
In addition to the ordinary user ROM area to store a microcomputer
operation control program, the flash memory has a Boot ROM area
that is used to store a program to control rewriting in CPU rewrite
and standard serial I/O modes. This Boot ROM area has had a stan-
dard serial I/O mode control program stored in it when shipped from
the factory. However, the user can write a rewrite control program in
this area that suits the user’s application system. This Boot ROM
area can be rewritten in only parallel I/O mode.
Parallel I/O mode
800016
FFFF16
Block 1 : 32 kbyte
User ROM area
BSEL = 0
F00016
FFFF16
4 kbyte
Boot ROM area
BSEL = 1
CPU rewrite mode, standard serial I/O mode
Product name
M38507F8
Flash memory
start address
800016
800016
Block 1 : 32 kbyte
FFFF16
User ROM area
User area / Boot area selection bit = 0
F00016
FFFF16
4 kbyte
Boot ROM area
User area / Boot area selection bit = 1
Fig. 44 Block diagram of flash memory version
Notes 1: The Boot ROM area can be rewritten in only parallel
input/output mode. (Access to any other areas is inhibited.)
2: To specify a block, use the maximum address in the block.
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