EBS52UC8APSA-75 데이터 시트보기 (PDF) - Elpida Memory, Inc
부품명
상세내역
일치하는 목록
EBS52UC8APSA-75 Datasheet PDF : 14 Pages
| |||
EBS52UC8APSA
Byte No. Function described
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Hex value
28
Row active to row active min
29
/RAS to /CAS delay min
(-7A/7AL)
(-75/75L)
0 0 0 0 1 1 1 1 0FH
0 0 0 0 1 1 1 1 0FH
0 0 0 1 0 1 0 0 14H
30
Minimum /RAS pulse width
0 0 1 0 1 1 0 1 2DH
31
Density of each bank on module
0 1 0 0 0 0 0 0 40H
32
Address and command signal input
setup time
0
0
0
1
0
1
0
1
15H
33
Address and command signal input
hold time
0
0
0
0
1
0
0
0
08H
34
Data signal input setup time
0 0 0 1 0 1 0 1 15H
35
Data signal input hold time
0 0 0 0 1 0 0 0 08H
36 to 61 Superset information
0 0 0 0 0 0 0 0 00H
62
SPD data revision code
63
Checksum for Bytes 0 to 62
(-7A/7AL)
(-75/75L)
0 0 0 1 0 0 1 0 12H
1 0 0 1 0 0 1 0 92H
1 1 0 1 0 0 1 1 D3H
64 to 65 Manufacturer’s JEDEC ID code
0 1 1 1 1 1 1 1 7FH
66
Manufacturer’s JEDEC ID code
1 1 1 1 1 1 1 0 FEH
67 to 71 Manufacturer’s JEDEC ID code
0 0 0 0 0 0 0 0 00H
72
Manufacturing location
73 to 90 Manufacturer’s part number
91 to 92 Revision code
93 to 94 Manufacturing date
95 to 98 Assembly serial number
99 to 125 Manufacturer specific data
126
Reserved (Intel specification
frequency)
0 1 1 0 0 1 0 0 64H
127
Reserved (Intel specification /CAS#
latency support)
1
1
0
0
0
1
1
1
C7H
Comments
15ns
15ns
20ns
45ns
256MB
1.5ns
0.8ns
1.5ns
0.8ns
1.2
Continuation code
Elpida Memory
100MHz
Data Sheet E0240E20 (Ver. 2.0)
5
Share Link: 