IMX51A 데이터 시트보기 (PDF) - Freescale Semiconductor
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IMX51A Datasheet PDF : 172 Pages
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Features
Table 2. i.MX51A Digital and Analog Modules (continued)
Block
Mnemonic
Block Name Subsystem
Brief Description
eSDHC-4
(muxed with
P-ATA)
Enhanced
Multi-Media
Card/
Secure Digital
Host
Controller
Connectivity
Peripherals
FEC
Fast Ethernet Connectivity
Controller
Peripherals
FIRI
GPIO-1
GPIO-2
GPIO-3
GPIO-4
GPT
Fast
Infra-Red
Interface
General
Purpose I/O
Modules
Connectivity
Peripherals
System
Control
Peripherals
General
Purpose
Timer
Timer
Peripherals
GPU
Graphics
Processing
Unit
Multimedia
Peripherals
GPU2D
I2C-1
I2C-2
HS-I2C
Graphics
Multimedia
Processing Peripherals
Unit-2D Ver. 1
I2C Interface Connectivity
Peripherals
Can be configured as eSDHC (see above) and is muxed with the P-ATA
interface.
The Ethernet Media Access Controller (MAC) is designed to support both
10 Mbps and 100 Mbps ethernet/IEEE Std 802.3™ networks. An external
transceiver interface and transceiver function are required to complete the
interface to the media.
Fast Infra-Red Interface
These modules are used for general purpose input/output to external ICs. Each
GPIO module supports up to 32 bits of I/O.
Each GPT is a 32-bit “free-running” or “set and forget” mode timer with a
programmable prescaler and compare and capture register. A timer counter
value can be captured using an external event, and can be configured to trigger
a capture event on either the leading or trailing edges of an input pulse. When
the timer is configured to operate in “set and forget” mode, it is capable of
providing precise interrupts at regular intervals with minimal processor
intervention. The counter has output compare logic to provide the status and
interrupt at comparison. This timer can be configured to run either on an external
clock or on an internal clock.
The GPU provides hardware acceleration for 2D and 3D graphics
algorithms with sufficient processor power to run desk-top quality
interactive graphics applications on displays up to HD720
resolution. It supports color representation up to 32 bits per pixel.
The GPU with its 128 KByte memory enables high performance mobile 3D and
2D vector graphics at rates up to 27 Mtriangles/sec, 166 M pixels/sec, 664
Mpixels/sec (Z).
The GPU2D provides hardware acceleration for 2D graphic
algorithms with sufficient processor power to run desk-top quality
interactive graphics applications on displays up to HD720 resolution.
I2C provides serial interface for controlling peripheral devices. Data rates of up
to 400 Kbps are supported by two of the I2C ports. Data rates of up to 3.4 Mbps
(I2C Specification v2.1) are supported by the HS-I2C.
Note: See the errata for the HS-I2C in the i.MX51 Chip Errata. The two standard
I2C modules have no errata.
i.MX51A Automotive and Infotainment Applications Processors, Rev. 2
6
Freescale Semiconductor
Preliminary—Subject to Change Without Notice
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