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IMX51A 데이터 시트보기 (PDF) - Freescale Semiconductor

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IMX51A Datasheet PDF : 172 Pages
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Features
Table 2. i.MX51A Digital and Analog Modules (continued)
Block
Mnemonic
Block Name Subsystem
Brief Description
WDOG-2 Watch Dog Timer
(TZ)
(TrustZone) Peripherals
XTALOSC Crystal
Clocking
Oscillator I/F
The TrustZone Watchdog (TZ WDOG) timer module protects against TrustZone
starvation by providing a method of escaping normal mode and forcing a switch
to the TZ mode. TZ starvation is a situation where the normal OS prevents
switching to the TZ mode. This situation should be avoided, as it can
compromise the system’s security. Once the TZ WDOG module is activated, it
must be serviced by TZ software on a periodic basis. If servicing does not take
place, the timer times out. Upon a time-out, the TZ WDOG asserts a TZ mapped
interrupt that forces switching to the TZ mode. If it is still not served, the TZ
WDOG asserts a security violation signal to the CSU. The TZ WDOG module
cannot be programmed or deactivated by a normal mode SW.
The XTALOSC module allows connectivity to an external crystal.
2.1 Special Signal Considerations
Table 3 lists special signal considerations for the i.MX51. The signal names are listed in alphabetical order.
The package contact assignments are found in Section 5, “Package Information and Contact
Assignments.” Signal descriptions are defined in the i.MX51 reference manual.
Table 3. Special Signal Considerations
Signal Name
CKIH1, CKIH2
CLK_SS
COMP
FASTR_ANA and
FASTR_DIG
GPANAIO
GPIO_NAND
Remarks
Inputs feeding CAMPs (Clock Amplifiers) that have on-chip ac coupling precluding the need for
external coupling capacitors. The CAMPs are enabled by default, but the main clocks feeding the
on-chip clock tree are sourced from XTAL/EXTAL by default. Optionally, the use of a low jitter
external oscillators to feed CKIH1 or CKIH2 (while not required) can be an advantage if low jitter
or special frequency clock sources are required by modules driven by CKIH1 or CKIH2. See CCM
chapter in the i.MX51 reference manual for details on the respective clock trees.
After initialization, the CAMPs could be disabled (if not used) by CCM registers (CCR CAMPx_EN
field). If disabled, the on-chip CAMP output is low; the input is irrelevant. If unused, the user should
tie CKIH1/CKIH2 to GND for best practice.
Clock Source Select is the input that selects the default reference clock source providing input to
the DPLLs. To use a reference in the megahertz range per Table 8, tie CLK_SS to GND to select
EXTAL/XTAL. To use a reference in the kilohertz range per Table 59, tie CLK_SS to NVCC_PER3
to select CKIL. After initialization, the reference clock source can be changed (initial setting is
overwritten).
Note: Because this input has a keeper circuit, Freescale recommends tying this input to directly
to GND or NVCC_PER3. If a series resistor is used its value must be 4.7 kΩ.
The user should bypass this reference with an external 0.1 µF capacitor tied to GND. If TV OUT is
not used, float the COMP contact and ensure the DACs are powered down.
Note: Previous engineering samples required this reference to be bypassed to a positive supply.
These signals are reserved for Freescale manufacturing use only. User must tie both connections
to GND.
This signal is reserved for Freescale manufacturing use only. Users should float this output.
This is a general-purpose input/output (GPIO3_12) on the NVCC_NANDF_A power rail.
i.MX51A Automotive and Infotainment Applications Processors, Rev. 2
Freescale Semiconductor
11
Preliminary—Subject to Change Without Notice

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