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IDT72815LB35BG 데이터 시트보기 (PDF) - Integrated Device Technology

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IDT72815LB35BG
IDT
Integrated Device Technology IDT
IDT72815LB35BG Datasheet PDF : 20 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
IDT72805/72815/72825 CMOS Dual SyncFIFO
256 x 18, 512 x 18, and 1024 x 18
COMMERCIAL TEMPERATURE RANGE
PROGRAMMABLE ALMOST-EMPTY FLAG (PAEA,
PAEB)
The Programmable Almost-Empty Flag (PAEA, PAEB) will
go LOW when the read pointer is “n” locations less than the
write pointer. The offset “n” is defined in the EMPTY offset
register.
If there is no Empty offset specified, PAE will be LOW when
the device is 31 away from completely empty for 72805LB, 63
away from completely empty for 72815LB, and 127 away from
completely empty for 72825LB.
The PAE is asserted LOW on the LOW-to-HIGH transition
of RCLK. PAE is reset to HIGH on the LOW-to-HIGH transition
of WCLK. Thus PAF is asychronous.
WRITE EXPANSION OUT/HALF-FULL FLAG
(WXOA/HFA, WXOB/HFB)
This is a dual-purpose output. In the Single Device and
Width Expansion mode, when WXI is grounded, this output
acts as an indication of a half-full memory.
After half of the memory is filled, and at the LOW-to-HIGH
transition of the next write cycle, the Half-Full Flag goes LOW
and will remain set until the difference between the write
pointer and read pointer is less than or equal to one half of the
total memory of the device. The Half-Full Flag (HFA, HFB) is
then reset to HIGH by the LOW-to-HIGH transition of the read
clock (RCLK). The HF is asychronous.
In the Depth Expansion or Daisy Chain mode, WXI is
connected to WXO of the previous device. This output acts as
a signal to the next device in the Daisy Chain by providing a
pulse when the previous device writes to the last location of
memory.
READ EXPANSION OUT (RXOA, RXOB)
In the Depth Expansion or Daisy Chain configuration, Read
Expansion In (RXIA, RXIB) is connected to Read Expansion
Out (RXOA, RXOB) of the previous device. This output acts as
a signal to the next device in the Daisy Chain by providing a
pulse when the previous device reads from the last location of
memory.
DATA OUTPUTS (Q0A-QA17, QB0-QB17)
Q0-Q17 are data outputs for 18-bit wide data.
RS
REN, WEN, LD
EF , PAE
FF, PAF, HF
Q0 - Q17
t RS
tRSS
t RSF
t RSF
t RSF
t RSR
NOTES:
1. After reset, the outputs will be LOW if OE = 0 and tri-state if OE = 1.
2. The clocks (RCLK, WCLK) can be free-running during reset.
Figure 4. Reset Timing(2)
5.17
OE = 1(1)
OE = 0 3139 drw 04
8

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