IDT72801(2001) 데이터 시트보기 (PDF) - Integrated Device Technology

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IDT72801
(Rev.:2001)

DUAL CMOS SyncFIFO™

Integrated Device Technology 

IDT72801/728211/72821/72831/72841/72851

Commercial And Industrial Temperature Range

WCLKA (WCLKB)

LDA (LDB)

WENA1 (WENB1)

DA0 - DA7

(DB0 - DB7)

tCLK

tCLKL

tENS

tENS

tDS

PAE OFFSET

(LSB)

tENH

tDH

PAE OFFSET

(MSB)

PAF OFFSET

(LSB)

PAF OFFSET

(MSB)

3034 drw 13

Figure 12. Write Offset Register Timing

RCLKA (RCLKB)

LDA (LDB)

RENA1, RENA2

(RENB1, RENB2)

QA0 - QA7

(QB0 - QB7)

tCLK

tCLKH

tCLKL

tENS

tENS

tENH

tA

DATA IN OUTPUT REGISTER

EMPTY OFFSET

(LSB)

EMPTY OFFSET

(MSB)

FULL OFFSET

(LSB)

FULL OFFSET

(MSB)

3034 drw 14

Figure 13. Read Offset Register Timing

13

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