ICSSSTUAF32869A 데이터 시트보기 (PDF) - Integrated Device Technology

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ICSSSTUAF32869A

14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2

Integrated Device Technology 

ICSSSTUAF32869A

14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2

Register Timing

RESET

COMMERCIAL TEMPERATURE GRADE

DCS

CSR

CLK

n

n+1

n+2

n+3

n+4

CLK

D1 - D14(1)

Q1 - Q14(1)

PARIN (2)

PPO (2)

PTYERR (2)

tSU

tH

tPD

CLK to Q

tSU

tH

tPD

CLK to PPO

tPD

CLK to PTYERR

tPD

CLK to PTYERR

NOTES:

1.This range does not include D1, D4, and D7, and their corresponding outputs.

2.PARIN is used to generate PPO and PTYERR.

14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2

14

ICSSSTUAF32869A

7095/13

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