ICS9250-13 데이터 시트보기 (PDF) - Integrated Circuit Systems
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ICS9250-13 Datasheet PDF : 15 Pages
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ICS9250 - 13
Serial Configuration Command Bitmap
Byte0: Functionality and Frequency Select Register (default = 0)
Bit
Description
Bit 7
0 - ±0.25% Spread Spectrum Modulation
1 - ±0.6% Spread Spectrum Modulation
Bit (2,6:4)
CPUCLK
(MHz)
SDRAM PCICLK
(MHz) (MHz)
0000
90.00
90.00
45.00
0001
89.01
89.01
44.51
0010
88.00
88.00
44.00
0011
86.99
86.99
43.50
0100
85.91
85.91
42.95
0101
85.01
85.01
42.51
Bit
0110
(2,6:4) 0111
84.00
82.00
84.00
82.00
42.00
41.00
1000
81.01
81.01
40.51
1001
80.00
80.00
40.00
1010
83.31
83.31
41.65
1011
68.49
68.49
34.24
1100
78.00
78.00
39.00
1101
75.00
75.00
37.50
1110
71.99
71.99
35.99
1111
66.82
66.82
33.41
0-Frequency is selected by hardware select,
Bit 3 latched inputs
1- Frequency is selected by Bit 2,6:4
Bit 1
0 - Normal operation
1 - Spread Spectrum Enabled
Bit 0
0 - Running
1 - Tristate all outputs
PWD
1
XXX
Note 1
0
1
0
Note 1. Default at Power-up will be for latched logic inputs to define frequenc,. Bits 2, 6:4 are default to 0000.
5
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