Philips Semiconductors
Real time 5-decade counter
Maximum clock
pulse frequency
CPA and CPS
VDD
V
SYMBOL MIN. TYP. MAX.
5
2,5 5
MHz
10
fmax
15
6 12
8 16
MHz
MHz
Product specification
HEF4534B
LSI
Dynamic power
dissipation per
package (P)(1)
Note
1. Cext = 0.
VDD
V
TYPICAL FORMULA FOR P (µW)
5
1 100 fi + ∑ (foCL) × VDD2
where
10
4 800 fi + ∑ (foCL) × VDD2
fi = input freq. (MHz)
15
12 000 fi + ∑ (foCL) × VDD2
fo = output freq. (MHz)
CL = load cap. (pF)
∑ (foCL) = sum of outputs
VDD = supply voltage (V)
January 1995
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