CMX882 데이터 시트보기 (PDF) - CML Microsystems Plc

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CMX882

FRS Signalling Processor

CML Microsystems Plc 

FRS Signalling Processor

CMX882

Voice Processing Combinations

Table 1 shows the valid voice processing combinations.

Table 1 Voice Processing Combinations

TX

Compress Scramble Pre-Emphasis

RX

Filter Filter De-Emphasis De-Scramble Expand

1

3

3

2

3

3

3

3

3

3

3

3

3

3

3

4

3

3

3

3

5

3

3

3

3

3

3

6

3

3

3

3

Not Valid

7

3

3

3

3

3

3

3

3

Not Recommended

81

3

3

3

3

3

3

Host Interface

A serial data interface (C-BUS) is used for command, status and data transfers between the CMX882 and

the host µC; this interface is compatible with microwire, SPI etc. Interrupt signals notify the host µC when

a change in status has occurred and the µC should read the status register across the C-BUS and

respond accordingly. Interrupts only occur if the appropriate mask bit has been set. See section 1.6.15.

Auxiliary (Signal Monitor) analogue signal

The CMX882 includes a Signal level monitor. This is an 8-bit successive approximation ADC and a two

level signal sensor. The two level sensor facility can be used in conjunction with the power saving mode

to wake up powered down blocks, and issue an interrupt on the IRQN line when the Signal exceeds the

preset threshold level. The auxiliary ADC voltage reference is taken directly from the VDD(A) supply, so

the Signal level being monitored should be derived from this supply voltage.

1 Audio quality is somewhat degraded.

 2004 CML Microsystems Plc

15

D/882/7

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