+3.3V, 2.5Gbps, SDH/SONET 16:1 Serializer
with Clock Synthesis and LVDS Inputs
Typical Operating Characteristics
(VCC = +3.3V, PECL loads = 50Ω ±1%, TA = +25°C, unless otherwise noted.)
SUPPLY CURRENT
vs. TEMPERATURE
200
180
160
140
120
PECL OUTPUTS UNTERMINATED
100
-50 -25 0 25 50 75 100
TEMPERATURE (°C)
SERIAL-DATA OUTPUT EYE DIAGRAM
50ps/div
SERIAL-DATA OUTPUT JITTER
fRCK = 155.52MHz
fRCK = 155.52MHz
5ps/div
TOTAL WIDEBAND RMS JITTER = 2.155ps
PEAK-TO-PEAK JITTER = 15.7ps
OUTPUT JITTER GENERATION
vs. RCLK AMPLITUDE
3.0
2.5
2.0
fRCLK = 38.88MHz
fRCLK = 51.84MHz
1.5
1.0
0.5
fRCLK = 155.52MHz fRCLK = 77.76MHz
0
100 150 200 250 300 350 400
RCLK AMPLITUDE (mV)
4 _______________________________________________________________________________________