AD6231 데이터 시트보기 (PDF) - Analog Devices
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AD6231 Datasheet PDF : 10 Pages
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AD8253
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Supply Voltage
Power Dissipation
Output Short-Circuit Current
Common-Mode Input Voltage
Differential Input Voltage
Digital Logic Inputs
Storage Temperature Range
Operating Temperature Range2
Lead Temperature (Soldering 10 sec)
Junction Temperature
θJA (4-Layer JEDEC Standard Board)
Package Glass Transition Temperature
Rating
±17 V
See Figure 3
Indefinite1
±VS
±VS
±VS
–65°C to +125°C
–40°C to +85°C
300°C
140°C
112°C/W
140°C
1 Assumes the load is referenced to mid supply.
2 Temperature for specified performance is −40°C to +85°C. For performance
to +125°C, see the Error! Reference source not found. section.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the AD8253 package is
limited by the associated rise in junction temperature (TJ) on
the die. The plastic encapsulating the die locally reaches the
junction temperature. At approximately 140°C, which is the
glass transition temperature, the plastic changes its properties.
Even temporarily exceeding this temperature limit may change
the stresses that the package exerts on the die, permanently
shifting the parametric performance of the AD8253. Exceeding
a junction temperature of 140°C for an extended period can
result in changes in silicon devices, potentially causing failure.
The still-air thermal properties of the package and PCB (θJA),
the ambient temperature (TA), and the total power dissipated in
the package (PD) determine the junction temperature of the die.
The junction temperature is calculated as
( ) TJ = TA + PD × θJA
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
Preliminary Technical Data
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins (VS) times the
quiescent current (IS). Assuming the load (RL) is referenced to
midsupply, the total drive power is VS/2 × IOUT, some of which is
dissipated in the package and some in the load (VOUT × IOUT).
The difference between the total drive power and the load
power is the drive power dissipated in the package.
PD = Quiescent Power + (Total Drive Power − Load Power)
( ) PD =
VS × IS
+
⎜⎜⎝⎛
VS
2
× VOUT
RL
⎟⎟⎠⎞ –
VOUT 2
RL
In single-supply operation with RL referenced to −VS, worst case
is VOUT = VS/2.
Airflow increases heat dissipation, effectively reducing θJA. In
addition, more metal directly in contact with the package leads
from metal traces, through holes, ground, and power planes
reduces the θJA.
Figure 3 shows the maximum safe power dissipation in the
package vs. the ambient temperature on a 4-layer JEDEC
standard board.
2.00
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0
–40 –20
0
20
40
60
80
AMBIENT TEMPERATURE (°C)
100 120
Figure 3. Maximum Power Dissipation vs. Ambient Temperature
ESD CAUTION
Rev. prA | Page 6 of 10
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