A3966
Dual Full-Bridge PWM Motor Driver
FUNCTIONAL BLOCK DIAGRAM
PHASE 1
LOGIC
SUPPLY
V CC
V BB
LOAD
SUPPLY
UVLO
& TSD
ENABLE 1
RT
BLANKING
PWM LATCH 1 GATE 1
R
Q
S
CURRENT-SENSE
COMPARATOR 1
+
–
RC
CT
OSC
SENSE 1
R1S
SENSE 2
R 2S
CURRENT-SENSE
COMPARATOR 2
+
–
BLANKING
GATE 2
PWM LATCH 2
R
Q
S
÷4
REFERENCE
PHASE2
UVLO
& TSD
ENABLE 2
GROUND
Dwg. FP-036-6
TRUTH TABLE
PHASE
X
H
L
ENABLE
H
L
L
OUTA
Off
H
L
OUTB
Off
L
H
X = Irrelevant
Typical output saturation voltages showing
Satlington sink-driver operation.
2.5
TA = +25°C
2.0
1.5
1.0
SOURCE DRIVER
0.5
SINK DRIVER
0
200
300
400
500
600
700
OUTPUT CURRENT IN MILLIAMPERES
Dwg. GP-064-1A
Allegro MicroSystems, LLC
3
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com