93LCS56 데이터 시트보기 (PDF) - Microchip Technology
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93LCS56 Datasheet PDF : 12 Pages
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93LCS56/66
FIGURE 2-7: ERASE TIMING
PE
CS
CLK
T CSL
CHECK STATUS
STANDBY
DI
1
1
1
A7 • • •
A0
TRI-STATE
DO
• Address bit A7 is a "don't care" for 93LCS56. PRE = 0
FIGURE 2-8: ERAL TIMING
PE
CS
CLK
T SV
BUSY
TCZ
TRI-STATE
READY
T WC
TCSL
CHECK STATUS
STANDBY
DI
1
0
0
TRI-STATE
DO
1
0
X
•••
X
6 DON'T CARE BITS
TSV
BUSY
TCZ
TRI-STATE
READY
FIGURE 2-9: PRREAD TIMING
PRE
CS
PRE = 0
TEC
Guarantee at VCC = 4.5V to 6.0V
Protect Register must be cleared
T CSL
CLK
DI
1
1
0
X
•••
X
8 DON'T CARE BITS
DO
0 A7
A6
•••
A0 • X •
• Address bit A7 is a "don't care" for 93LCS56. PE = X
DS11181D-page 8
Preliminary
© 1996 Microchip Technology Inc.
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