74LVQ299 데이터 시트보기 (PDF) - STMicroelectronics
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74LVQ299 Datasheet PDF : 12 Pages
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74LVQ299
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
1, 19
2, 3
7, 13, 6, 14, 5, 15, 4, 16
8, 17
9
11
12
18
10
20
SYMBOL
S0, S1
G1, G2
A/QA to H/QH
QA’,QH’
CLEAR
SR
CLOCK
SL
GND
VCC
NAME AND FUNCTION
Mode Select Inputs
3-State Output Enable Inputs (Active LOW)
Parallel Data Inputs or 3-State Parallel Outputs (Bus Driver)
Serial Outputs (Standard Output)
Asynchronous Master Reset Input (Active LOW)
Serial Data Shift Right Input
Clock Input (LOW to HIGH, Edge-triggered)
Serial Data Shift Left Input
Ground (0V)
Positive Supply Voltage
TRUTH TABLE
INPUTS
INPUTS/OUTPUTS
OUTPUTS
MODE
CLEAR
FUNCTION
SELECTED
OUTPUT
CONTROL
CLOCK
SERIAL
A/QA H/QH QA’ QH’
S1
S0
G1* G2*
SL
SR
Z
L
H
H
X
X
X
X
X
Z
Z
L
L
L
L
X
L
L
X
X
X
L
L
L
L
CLEAR
L
X
L
L
L
X
X
X
L
L
L
L
HOLD
H
L
L
L
L
X
X
X QA0 QH0 QA0 QH0
SHIFT
H
L
H
L
L
RIGHT
H
L
H
L
L
X
H
H QGn H QGn
X
L
L QGn L QGn
SHIFT
H
H
L
L
L
LEFT
H
H
L
L
L
H
X QBn H QBn H
L
X QBn L QBn L
LOAD
H
H
H
X
X
X
X
a
h
a
h
* When one or both controls are high, the eight input/output terminals are the high impedance state: however sequential operation or cleaning
of the register is not affected.
Z : High Impedance
Qn0 : The level of An before the indicated steady state input conditions were established.
Qnn : The level of Qn before the most recent active transition indicated by OR
a, h : The level of the steady state inputs A, H, respectively.
X : Don’t Care
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