EN29F002(2000) 데이터 시트보기 (PDF) - Eon Silicon Solution Inc.
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EN29F002 Datasheet PDF : 32 Pages
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EN29F002 / EN29F002N
Table 4). All identifiers for manufacturer and device codes possess odd parity with the DQ7 defined
as the parity bit.
Write Mode
Write is used for device programming and erase through the command register. This mode is
selected with CE = W E = L and OE = H. The contents of the command register are the inputs to
the internal state machine. The command register is a set of latches used to store the commands
along with the addresses and data information needed to execute that command. Address latching
occurs on the falling edge of W E or CE (whichever occurs later) and data latching occurs on the
rising edge of W E or CE (whichever occurs first).
Temporary Block Unprotect Mode
EN29F002 allows protected blocks to be temporarily unprotected for making changes to data stored
in a protected block in system (n/a for EN29F002N). To activate the temporary block unprotect, the
RESET pin must be set to a high voltage (+ 12V). In this mode, protected blocks can be
programmed or erased by selecting the block addresses. Once the high voltage (+ 12V) is removed
from RESET pin, all previously protected blocks will revert to their protected state.
RESET Hardware Reset Mode (not available on EN29F002N)
Resetting the EN29F002 device is performed when the RESET pin is set to VIL and kept low for at
least 500ns. The internal state machine will be reset to the read mode. Any program/erase
operation in progress during hardware reset will be terminated and data may be corrupted.
If the RESET pin is tied to the system reset command, the device will be automatically reset to the
read mode and enable the system’s microprocessor to read the boot-up firmware from the FLASH
memory.
COMMAND DEFINITIONS
The operations of the EN29F002 are selected by one or more commands written into the command
register to perform Read/Reset Memory, Read ID, Read Block Protection, Program, Block Erase,
Chip Erase, Erase Suspend and Erase Resume. Commands are made up of data sequences
written at specific addresses via the command register. The sequences for the specified operation
are defined in the Command Table (Table 5). Incorrect addresses, incorrect data values or
improper sequences will reset the device to the read mode.
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