CY7C4221V-25JC 데이터 시트보기 (PDF) - Cypress Semiconductor
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CY7C4221V-25JC Datasheet PDF : 16 Pages
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CY7C4421V/4201V/4211V/4221V
PRELIMINARY
CY7C4231V/4241V/4251V
AC Test Loads and Waveforms[5, 6]
3.3V
OUTPUT
R1= 330 Ohms
CL
INCLUDING
JIG AND
SCOPE
R2=510 Ohms
42X1V–4
3.0V
GND
≤ 3 ns
ALL INPUT PULSES
90%
10%
90%
10%
≤ 3 ns
42X1V–5
Equivalent to:
THÉVENIN EQUIVALENT
Rth=200 Ohms
OUTPUT
Vth=2.0V
Switching Characteristics Over the Operating Range
7C42X1V-15
Parameter
Description
Min. Max.
tS
tA
tCLK
tCLKH
tCLKL
tDS
tDH
tENS
tENH
tRS
tRSS
tRSR
tRSF
tOLZ
tOE
tOHZ
tWFF
tREF
tPAF
tPAE
tSKEW1
Clock Cycle Frequency
Data Access Time
2
Clock Cycle Time
15
Clock HIGH Time
6
Clock LOW Time
6
Data Set-Up Time
4
Data Hold Time
1
Enable Set-Up Time
4
Enable Hold Time
1
Reset Pulse Width[7]
15
Reset Set-Up Time
10
Reset Recovery Time
10
Reset to Flag and Output Time
Output Enable to Output in Low Z[8]
0
Output Enable to Output Valid
3
Output Enable to Output in High Z[8]
3
Write Clock to Full Flag
Read Clock to Empty Flag
Clock to Programmable Almost-Full Flag
Clock to Programmable Almost-Full Flag
Skew Time between Read Clock and Write Clock 6
for Empty Flag and Full Flag
66.7
11
15
8
8
11
11
11
11
tSKEW2
Skew Time between Read Clock and Write Clock 15
for Almost-Empty Flag and Almost-Full Flag
Notes:
1. See the last page of this specification for Group A subgroup testing information.
2. Outputs open. Tested at Frequency = 20 MHz.
3. All inputs = VCC - 0.2V, except WCLK and RCLK, which are switching at 20MHz.
4. Tested initially and after any design or process changes that may affect these parameters.
5. CL = 30 pF for all AC parameters except for tOHZ.
6. CL = 5 pF for tOHZ.
7. Pulse widths less than minimum values are not allowed.
8. Values guaranteed by design, not currently tested.
7C42X1V-25
Min. Max.
40
2
15
25
10
10
6
2
6
2
25
15
15
25
0
3
12
3
12
15
15
15
15
10
18
7C42X1V-35
Min. Max.
28.6
2
20
35
14
14
7
2
7
2
35
20
20
35
0
3
15
3
15
20
20
20
20
12
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
20
ns
4
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