LD39300(2017) 데이터 시트보기 (PDF) - STMicroelectronics

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LD39300
(Rev.:2017)

Ultra low drop BICMOS voltage regulator

STMicroelectronics 

Contents

Contents

LD39300

1 Diagram ............................................................................................ 3

2 Pin configuration ............................................................................. 4

3 Typical application circuits............................................................. 5

4 Maximum ratings ............................................................................. 7

5 Electrical characteristics ................................................................ 8

6 Typical performance characteristics ........................................... 10

7 Application notes .......................................................................... 13

7.1 External capacitors.......................................................................... 13

7.2 Input capacitor................................................................................. 13

7.3 Output capacitor.............................................................................. 13

7.4 Thermal note ................................................................................... 13

7.5 Inhibit input operation ...................................................................... 13

8 Package information ..................................................................... 14

8.1 DPAK package information ............................................................. 14

8.2 PPAK package information ............................................................. 17

8.3 PPAK and DPAK packing information ............................................. 19

9 Revision history ............................................................................ 21

2/22

DocID13160 Rev 3

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