FX805 데이터 시트보기 (PDF) - CML Microsystems Plc

부품명

상세내역

일치하는 목록

FX805

Sub-audio signalling processor

CML Microsystems Plc 

Pin Number Function

FX805

J/LG/LS

13

Rx Amp (-) In: The inverting input to the on-chip Rx Input Amp. See Figures 2, 3 and 4.

14

Rx Amp (+) In: The non-inverting input to the on-chip Rx Input Amp.

15

Rx Amp Out: The output of the on-chip Rx Input Op-Amp. This circuit may be used, with external

components, as a signal amplifier and an anti-aliasing filter prior to the Rx Lowpass Filter, or for other

purposes. See Figure 2 for component details.

16

Rx Sub-Audio In: The received sub-audio (CTCSS/NRZ) input. This input is internally biased to V /2

DD

and requires to be a.c. coupled or biased. See Figure 2 for component details.

17

Rx Sub-Audio Out: The output of the Rx Lowpass Filter. This output may be coupled into the on-chip

amplifier or comparator as required.

18

V : The internal circuitry bias line, held at V /2 this pin must be decoupled to V by capacitor C

BIAS

DD

SS

8

(see Figure 2).

19

Comparator In (-): The inverting input to the on-chip “comparator” amplifier. See Figures 2, 3 and 4.

20

Comparator (+): The non-inverting input to the on-chip “comparator” amplifier. See Figures 2, 3 and 4.

21

Comparator Out: The output of the “comparator” amplifier. This node is also internally connected to

the input of the Digital Noise Filter (see Figure 1). When both decoders are Powersaved, this output is

at a logic “0.”

22

NOTONE Timing: External RC components connected to this pin form the timing mechanism of a

NOTONE period timer. The external network determines the ‘charge-rate’ of the timer to VDD/2. Expiry of

the timer will cause an interrupt. This facility is only used in the CTCSS Rx mode.

23

Wake: This ‘real-time ’ input can be used to reactivate the FX805 from the ‘Powersave All’ condition

using an externally derived signal. The FX805 will be in a ‘Powersave All’ condition when both this pin

and Bit 0 of the Control Register are set to a logic “1.” Recovery from “Powersave All” is achieved by

putting either the Wake pin or the ‘Powersave All’ bit to logic “0,” thus allowing FX805 activation by the

µController or an external signal, such as R.S.S.I. or Carrier Detect.

24

V : Positive supply rail. A single +5-volt power supply is required. Levels and voltages within the Sub-

DD

Audio Signalling Processor are dependant upon this supply.

NOTE: (i) Further information on external components and DBS 800 system integration of this

microcircuit are contained in the System Support Document.

(ii) A glossary of abbreviations used in this document is supplied.

(iii) Guidance upon the generation and manipulation of NRZ Rx and Tx data is given in DBS

800 Application Support Document.

“C-BUS” is CML’s proprietry standard for the transmission of commands and data between a

µController and DBS 800 microcircuits. It may be used with any µController, and can, if

desired, take advantage of the hardware serial I/O functions embodied into many types of

µController. The “C-BUS” data rate is determined soley by the µController.

3

Share Link: