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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

PI6C102-16BH 데이터 시트보기 (PDF) - Pericom Semiconductor

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PI6C102-16BH Datasheet PDF : 12 Pages
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PI6C102-16
Spread Spectrum Clock Synthesizer
for Mobile Pentium II 1122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233445566778899001122112233445566778899001122
Type 5: PCI Clock Buffers (3.3V)
Symbol
Parameters
Conditions
IOHMIN Pull-up current
VOUT = 1.0V
IOHMAX Pull-up current
VOUT = 3.135V
IOLMIN Pull-down current
VOUT = 1.95V
IOLMAX
tRH
tFH
Pull-down current
VOUT = 0.4V
3.3V Type 5 output rise edge rate 3.3V ± 5% @ 0.4V-2.4V
3.3V Type 5 output fall edge rate 3.3V ± 5% @ 2.4V-0.4V
Min. Typ. Max. Units
-33
-33
mA
30
38
1
4
V/ns
1
4
AC Timing
Figure 1. Host Clock
to PCI CLK Offset
Parameters
tHKP (2.5V)
tHKH (2.5V)
tHKL (2.5V)
tHRISE (2.5V)
tHFALL (2.5V)
tJITTER (2.5V)
Duty Cycle (2.5V)
tHSKW (2.5V)
tPZL, tPZH
tPLZ, tPHZ
tHSTB
tPKP
tPKPS
tPKH
tPKL
tPSKW
tHPOFFSET
tPSTB
Host CLK period
Host CLK high time
Host CLK low time
Host CLK rise time
Host CLK fall time
Host CLK Jitter
Measured at 1.25V
Host Bus CLK Skew
Output enable delay
Output disable delay
Host CLK Stabilization from power-up
PCI CLK period
PCI CLK period stability
PCI CLK high time
PCI CLK low time
PCI Bus CLK Skew
Host to PCI Clock Offset
PCI CLK Stabilization from power-up
66 MHz
Min. Max.
15.0
15.5
5.2
5.0
0.4
1.6
0.4
1.6
250
45
55
175
1.0
8.0
1.0
8.0
3
30.0
µ
500
12.0
12.0
500
1.5
4.0
3
100 MHz
Min. Max.
10.0 10.5
3.0
2.8
0.4
1.6
0.4
1.6
250
45
55
175
1.0
8.0
1.0
8.0
3
30.0
µ
500
12.0
12.0
500
1.5
4.0
3
Units
ns
ps
%
ps
ns
ms
ns
ps
ns
ps
ns
ms
8
P8399-1 06/11/99

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