DESCRIPTION
The WED3EG7233S is a 2x16Mx72 Double Data Rate SDRAM memory module based on 128Mb DDR SDRAM component. The module consists of eighteen 16Mx8 DDR SDRAMs in 66 pin TSOP packages mounted on a 184 pin FR4 substrate.
Synchronous design allows precise cycle control with the use of system clock. Data I/O transactions are possible on both edges and Burst Lengths allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.

FEATURES
■ Double-data-rate architecture
■ DDR200 and DDR266
    • JEDEC design specifi ed
■ Bi-directional data strobes (DQS)
■ Differential clock inputs (CK & CK#)
■ Programmable Read Latency 2,2.5 (clock)
■ Programmable Burst Length (2,4,8)
■ Programmable Burst type (sequential & interleave)
■ Edge aligned data output, center aligned data input.
■ Auto and self refresh
■ Serial presence detect
■ Dual Rank
■ Power supply: 2.5V ± 0.20V
■ JEDEC standard 184 pin DIMM package
    • JD3 PCB height: 30.48mm (1.20")