DESCRIPTION
The WED3DG6417S is a 16Mx64 Double Data Rate SDRAM memory module based on 128Mb DDR SDRAM component. The module consists of eight 16Mx8 DDR SDRAMs in 66 pin TSOP package mounted on a 200 pin FR4 Substrate.
Synchronous design allows precise cycle control with the use of system clock. Data I/O transactions are possible on both edges and Burst Lenths allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.

FEATURES
■ Double-data-rate architecture
■ Bi-directional data strobes (DQS)
■ Differential clock inputs (CK & CK#)
■ Programmable Read Latency 2,2.5 (clock)
■ Programmable Burst Length (2,4,8)
■ Programmable Burst type (sequential & interleave)
■ Edge aligned data output, center aligned data input
■ Auto and self refresh
■ Serial presence detect
■ JEDEC standard 200 pin SO-DIMM package
■ Power supply: 2.5V ± 0.25V