Product Description
The VSC9210 provides forward error correction for any data rate and protocol operating up to 2.5Gb/s using a block oriented Reed-Solomon Forward Error Correction (FEC) algorithm RS(255,241). The device can be configured as a FEC encoder or a FEC decoder utilizing two 16-bit differential PECL I/O ports to interface with an external high speed multiplexer/demultiplexer pair. Clock dividers are provided on chip to facilitate control of external PLL circuitry.

FEATUREs:
• Reed Solomon RS(255,241) Codec
• Bit Error Rate Improvement from 105 to 1020
• Includes Optical Channel Overhead (OCh-OH) of 10Mb/s
• Provides Bit Error Rate Monitoring of FEC Line
• Processes Data Rates up to 2.654Gb/s and Information Rates to 2.488Gb/s
• Provides a Dedicated User Defined Data Channel at 10.368Mb/s

Benefits:
• Device Pin Configured as Stand-alone Encoder, Decoder, or Bypass with Cocks Disabled
• Provides Count of Correctable 0’s and 1’s that are in Error in Prior Code Word
• Interfaces Directly with Vitesse OC-48 Rate Components