INTRODUCTION
The UT54LVDS217 Serializer converts 21 bits of CMOS/TTL data into three LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fourth LVDS link. Every cycle of the transmit clock 21 bits of input data are sampled and transmitted.
FEATURES
15 to 75 MHz shift clock support
Low power consumption
Power-down mode <216μW (max)
Cold sparing all pins
Narrow bus reduces cable size and cost
Up to 1.575 Gbps throughput
Up to 197 Megabytes/sec bandwidth
325 mV (typ) swing LVDS devices for low EMI
PLL requires no external components
Rising edge strobe
Radiation-hardened design; total dose irradiation testing to MIL-STD-883 Method 1019
- Total-dose: 300 krad(Si) and 1 Mrad(Si)
- Latchup immune (LET > 100 MeV-cm2/mg)
Packaging options:
- 48-lead flatpack
Standard Microcircuit Drawing 5962-01534
- QML Q and V compliant part