The µPD72042A and µPD72042B are microcomputer peripheral LSI devices for IEBus protocol control. The µPD72042A and µPD72042B perform all the processing required for layers 1 and 2 of the IEBus. The devices incorporate large transmission and reception buffers, allowing the microcomputer to perform IEBus operations without interruption. They also contain an IEBus driver and receiver, allowing them to directly connected to the bus directly.

FEATURES
● Control of layers 1 and 2 of the IEBus protocol
  • Support of a multi-master scheme
  • Broadcast function
  • Two communication modes having different transmission speeds can be selected.
● Built-in IEBus driver and receiver
● Transmission and reception buffers
  Transmission buffer : 33 bytes, FIFO
  Reception buffer : 40 bytes, FIFO (capable of holding more than one frame of reception data.)
● Microcomputer interface
  Three-/two-wire serial I/O
  • Transfer starting with MSB : µPD72042A
  • Transfer starting with LSB : µPD72042B
● Program crashes can be detected by means of a watchdog timer.
● Low power consumption (standby mode): 50 µA (max)
● Oscillator frequency (fX): 6 MHz, 6.29 MHz
   • frequency accuracy: ±1.5%
● Operating voltage: 5 V ±10%