DESCRIPTION
   TC511001P/J/Z is a new generation of dynamic RAM that organizes 1,048,576 words in 1 bit. TC511001P/J/Z uses Toshibas CMOS silicon gate process technology and advanced circuit technology to provide a wide range of operating margins for internal and system users. Multiple address inputs allow the TC511001P/J/Z to be packaged in standard 18-pin plastic DIP, 26/20-pin plastic SOJ, and 20/19-pin plastic ZIP packages. The package size provides high system bit density and is compatible with widely used automated test and insertion equipment. System-oriented features include a single supply with 5V ±10% tolerance and the ability to directly interface with high-performance logic Schottky TTL and other families. Its special feature is that TC511001P/J/Z is in nibble mode, allowing users to serially access 4-bit data at high data rates. The "Test Mode" function is implemented starting from Revision C.