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S12ATD10B16CV2/D 데이터시트 - Freescale Semiconductor

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S12ATD10B16CV2/D

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Freescale Semiconductor Freescale

Overview
The MC9S12H256 microcontroller unit (MCU) is a 16-bit device composed of standard on-chip
peripherals including a 16-bit central processing unit (HCS12 CPU), 256K bytes of Flash EEPROM, 12K bytes of RAM, 4K bytes of EEPROM, two asynchronous serial communications interfaces (SCI), a serial peripheral interface (SPI), an IIC-bus interface (IIC), an 8-channel 16-bit timer (TIM), a 16-channel, 10-bit analog-to-digital converter (ATD), a six-channel pulse width modulator (PWM), and two CAN 2.0 A, B software compatible modules (MSCAN).


FEATUREs
• HCS12 Core
– 16-bit HCS12 CPU
  i. Upward compatible with M68HC11 instruction set
  ii. Interrupt stacking and programmer’s model identical to M68HC11
  iii.20-bit ALU
  iv. Instruction queue
  v. Enhanced indexed addressing
– MEBI (Multiplexed External Bus Interface)
– MMC (Module Mapping Control)
– INT (Interrupt control)
– BKP (Breakpoints)
– BDM (Background Debug Mode)
• CRG (low current oscillator, PLL, reset, clocks, COP watchdog, real time interrupt, clock monitor)
• 8-bit and 4-bit ports with interrupt functionality
– Digital filtering
– Programmable rising or falling edge trigger
• Memory
– 128K, 256K Flash EEPROM
– 2K, 4K byte EEPROM
– 6K, 12K byte RAM
• Analog-to-Digital Converter
– 8, 16 channels, 10-bit resolution
– External conversion trigger capability
• Two 1M bit per second, CAN 2.0 A, B software compatible modules
– Five receive and three transmit buffers
– Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit or 8x8bit
– Four separate interrupt channels for Rx, Tx, error and wake-up
– Low-pass filter wake-up function
– Loop-back for self test operation
• Timer
– 16-bit main counter with 7-bit prescaler
– 8 programmable input capture or output compare channels
– Two 8-bit or one 16-bit pulse accumulators
• 2, 6 PWM channels
– Programmable period and duty cycle
– 8-bit 2, 6-channel or 16-bit 1, 3-channel
– Separate control for each pulse width and duty cycle
– Center-aligned or left-aligned outputs
– Programmable clock select logic with a wide range of frequencies
– Fast emergency shutdown input
• Serial interfaces
– Two asynchronous Serial Communications Interfaces (SCI)
– Synchronous Serial Peripheral Interface (SPI)
– Inter-Integrated Circuit interface (IIC)
• Liquid Crystal Display driver with variable input voltage
– Configurable for up to 32 frontplanes and 4 backplanes or general purpose input or output
– 5 modes of operation allow for different display sizes to meet application requirements
– Unused frontplane and backplane pins can be used as general purpose I/O
• 16, 24 high current drivers suited for PWM motor control
– Each PWM channel switchable between two drivers in an H-bridge configuration
– Left, right and center aligned outputs
– Support for sine and cosine drive
– Dithering
– Output slew rate control
• 144-Pin or 112-Pin LQFP package
– I/O lines with 5V input and drive capability
– 5V A/D converter inputs
– Operation at 32MHz equivalent to 16MHz Bus Speed
– Development support
– Single-wire background debug™ mode (BDM)
– On-chip hardware breakpoints

 

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