General Description
The RTL8196E-CG is an integrated System-on-a-Chip (SoC) Application Specific Integrated Circuit (ASIC) L2 5-Port Ethernet switch. An RLX4181 CPU is embedded and the clock rate can be up to 400MHz. To improve computational performance, a 16Kbyte I-Cache, 8Kbyte D-Cache, 16Kbyte I-MEM, and 8Kbyte D-MEM are provided. A standard 5-signal P1149.1 compliant EJTAG test interface is supported for CPU testing and software development.

FEATUREs
■ SOC
   ◆ Embedded RISC CPU, RLX4181 with
      16Kbyte I-Cache, 8Kbyte D-Cache,
      16Kbyte I-MEM, 8Kbyte D-MEM
   ◆ Supports MIPS-1 ISA, MIPS16 ISA
   ◆ Clock Rate: 400MHz
   ◆ Provides a standard P1149.1 EJTAG test
      port
   ◆ Supports RLX4181 CPU suspend mode
■ L2 Capabilities
   ◆ Five Ethernet MAC switch with five
      IEEE 802.3 10/100M physical layer
      transceivers
   ◆ Non-blocking wire-speed reception and
      transmission and non-head-of-line
      blocking/forwarding
   ◆ Internal 256Kbit SRAM for packet
      buffering
   ◆ Internal 1024 entry 4-way hash L2 look
      up table
   ◆ Supports source and destination MAC
      address filtering
■ CPU Interface (NIC)
   ◆ Supports BSD mbuf-like packet structure
      with adjustable cluster size (128-byte to
      2Kbyte) to provide optimum memory
      utilization
   ◆ The NIC DMA supports multiple
      descriptor-ring architecture for QoS
      applications
■ Peripheral Interfaces
   ◆ Supports PCI Express Host with
      integrated PHY
   ◆ One PCI Express PHY embedded
   ◆ Supports one-port USB
      ■ USB 2.0 Host or Device
   ◆ One USB PHY embedded
   ◆ Supports two 16550 UARTs
   ◆ Supports up to 16 GPIO pins
■ Memory Interfaces
   ◆ Serial Flash (SPI Type)
      ■ Supports one bank and dual I/O
         channels for SPI Flash application
      ■ Each Flash bank could be configured
         as 256K/512K/1M/2M/4M/8M/16M
         Bytes
      ■ Boot up from SPI flash is supported
   ◆ SDR DRAM
      ■ Supports one SDR DRAM bank; each
         can be configured as
         2M/4M/8M/16M/32M/64Mbyte
      ■ 16-bit SDR DRAM data bus
         supported
   ◆ DDR1 DRAM
      ■ Supports one DDR1 DRAM bank
         that can be configured as
         16M/32M/64M/128Mbytes
      ■ 16-bit DDR1 DRAM data bus
         supported. System totally supports up
         to 128Mbyte DDR1 DRAM memory
         space
   ◆ DDR2 DRAM
      ■ Supports one DDR2 DRAM bank
         that can be configured as
         32M/64M/128Mbyte
      ■ 16-bit DDR2 DRAM data bus
         supported. System totally supports up
         to 128Mbyte DDR2 DRAM memory
         space
■ Supports Green Ethernet
   ◆ Cable length power saving
   ◆ Link down power saving
■ Supports IEEE 802.3az Energy Efficient
   Ethernet ability for 100Base-TX in full
   duplex operation and 10Base-T in full/half
   duplex mode
■ Other Added-Value Features
   ◆ Supports Link Down Power Saving in
      Ethernet PHYceivers
   ◆ Supports two hardware timers and one
      watchdog timer
   ◆ Per-port configurable auto-crossover
      function
   ◆ Built-in internal ROM booting
   ◆ Single 25MHz crystal or 40MHz clock
      input
■ Built-in SWR/LDO
   ◆ LDO for DDR1/DDR2
      ■ DDR1 DRAM: 3.3V to 2.5V
      ■ DDR2 DRAM: 3.3V to 1.8V
   ◆ SWR or LDO for Core Power
      ■ SWR or LDO 3.3V to 1.0V
■ LQFP128 package

System Applications
■ IEEE 802.11b/g/n AP/Router
■ IEEE 802.11a/b/g/n Dualband Concurrent Router
■ Wired Router