DESCRIPTION:
   Potato Semiconductor’s PO74G112A is designed for world top performance using submicron CMOS technology to achieve 750MHz TTL /CMOS output frequency with less than 2ns propagation delay. This dual negative-edge-triggered J-K flip-flop is designed for 1.65-V to 3.6-V VCC operation.

FEATURES:
• Patented technology
• Specified From –40°C to 85°C, –40°C to 125°C,
   and –55°C to 125°C
• Operating frequency up to 750MHz with 15pf load
• VCC Operates from 1.65V to 3.6V
• Propagation delay < 2ns max with 15pf load
• Low input capacitance: 4pf typical
• Latch-Up Performance Exceeds 250 mA Per
   JESD 17
• ESD Protection Exceeds JESD 22
• 5000-VHuman-BodyModel (A114-A)
• 200-VMachineModel (A115-A)
• Available in 16pin 150mil wide SOIC package
• Available in 16pin 173mil wide TSSOP package