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MBM29F002 데이터시트 - Fujitsu

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MBM29F002

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Fujitsu
Fujitsu Fujitsu

■ GENERAL DESCRIPTION
The MBM29F002TC/BC is a 2 M-bit, 5.0 V-Only Flash memory organized as 256K bytes of 8 bits each. The MBM29F002TC/BC is offered in a 32-pin TSOP(I) and 32-pin PLCC packages. This device is designed to be programmed in-system with the standard system 5.0 V VCCsupply. A 12.0 V VPPis not required for program or erase operations. The device can also be reprogrammed in standard EPROM programmers.

■ FEATURES
• Single 5.0 V read, write, and erase
    Minimizes system level power requirements
• Compatible with JEDEC-standard commands
    Pinout and software compatible with single-power supply Flash
    Superior inadvertent write protection
• 32-pin TSOP(I) (Package Suffix: PFTN-Normal Bend Type, PFTR-Reverse Bend Type)
    32-pin PLCC (Package Suffix: PD)
• Minimum 100,000 write/erase cycles
• High performance
    55 ns maximum access time
• Sector erase architecture
    One 16K byte, two 8K bytes, one 32K byte, and three 64K bytes
    Any combination of sectors can be erased. Also supports full chip erase
• Boot Code Sector Architecture
    T = Top sector
    B = Bottom sector
• Embedded Erase™ Algorithms
    Automatically pre-programs and erases the chip or any sector
• Embedded Program™ Algorithms
    Automatically programs and verifies data at specified address
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Low VCC write inhibit ≤ 3.2 V
• Hardware RESET pin
    Resets internal state machine to the read mode
• Erase Suspend/Resume
    Supports reading or programming data to a sector not being erased
• Sector protection
    Hardware method that disables any combination of sector from write or erase operation
• Temporary sector unprotection
    Temporary sector unprotection via the RESET pin

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