■ FEATURES
• Power supply voltage of 2.7 to 3.6 V
• High performance
    100 ns maximum access time
• Operating Temperature
    –20 to +85°C

— FLASH MEMORY
• Minimum 100,000 write/erase cycles
• Sector erase architecture
    One 16 K byte, two 8 K bytes, one 32 K byte, and thirty one 64 K bytes.
    Any combination of sectors can be concurrently erased. Also supports full chip erase.
• Boot Code Sector Architecture
    MB84VA2100: Top sector
    MB84VA2101: Bottom sector
• Embedded EraseTM Algorithms
    Automatically pre-programs and erases the chip or any sector
• Embedded ProgramTM Algorithms
    Automatically writes and verifies data at specified address
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Ready-Busy output (RY/BY)
    Hardware method for detection of program or erase cycle completion
• Automatic sleep mode
    When addresses remain stable, automatically switch themselves to low power mode.
• Low VCC write inhibit ≤ 2.5 V
• Erase Suspend/Resume
    Suspends the erase operation to allow a read in another sector within the same device
    Please refer to "MBM29LV160T/B" data sheet in detailed function

— SRAM
• Power dissipation
    Operating : 35 mA max.
    Standby : 50 µA max.
• Power down features using CE1s and CE2s
• Data retention supply voltage: 2.0 V to 3.6 V