OVERVIEW
ISSI's 64Mb Synchronous DRAM IS42S32200C1 is organized as 524,288 bits x 32-bit x 4-bank for improved performance. The synchronous DRAMs achieve high speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input.

FEATURES
• Clock frequency: 183, 166, 143 MHz
• Fully synchronous; all signals referenced to a positive clock edge
• Internal bank for hiding row access/precharge
• Single 3.3V power supply
• LVTTL interface
• Programmable burst length: (1, 2, 4, 8, full page)
• Programmable burst sequence: Sequential/Interleave
• Self refresh modes
• 4096 refresh cycles every 64 ms
• Random column address every clock cycle
• Programmable CAS latency (2, 3 clocks)
• Burst read/write and burst read/single write operations capability
• Burst termination by burst stop and precharge command
• Available in Industrial temperature grade
• Available in 400-mil 86-pin TSOP II and 90-ball BGA
• Available in Lead free