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HYS72D64300GU-6-B 데이터시트 - Infineon Technologies

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부품명
HYS72D64300GU-6-B

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page
40 Pages

File Size
1.3 MB

제조사
Infineon
Infineon Technologies Infineon

Description
   The HYS64D64300[G/H]U–[5/6]–B, HYS72D64300[G/H]U–[5/6]–B, HYS64D128320[G/H]U–[5/6]–B, and HYS72D128320[G/H]U–[5/6]–B are industry standard 184-Pin Unbuffered Dual-In-Line Memory Modules (UDIMM) organized as 64M ×64, 128M ×64 for non-parity and 64M ×72,128M ×72 for ECC main memory applications. The memory array is designed with 512Mbit Double Data Rate Synchronous DRAMs. A variety of decoupling capacitors are mounted on the printed circuit board. The DIMMs feature serial presence detect (SPD) based on a serial E2PROM device using the 2-pin I2C protocol. The first 128 bytes are programmed with configuration data and the second 128 bytes are available to the customer


FEATUREs
• 184-Pin Unbuffered Dual-In-Line Memory Modules (ECC and non-parity) for PC and Workstation main memory applications
• One rank 64M x 64, 64M ×72 and two ranks 128M × 64, 128M ×72 organization
• JEDEC standard Double Data Rate Synchronous DRAMs (DDR SDRAM) Single +2.5V (±0.2V) power supply
• Built with 512 Mbit DDR SDRAM in P-TSOPII-66-1 package
• Programmable CAS Latency, Burst Length, and Wrap Sequence (Sequential & Interleave)
• Auto Refresh (CBR) and Self Refresh
• All inputs and outputs SSTL_2 compatible
• Serial Presence Detect with E2PROM
• JEDEC standard MO-206 form factor: 133.35 mm × 31.75 mm × 4.00 mm max.
• Jedec standard reference layout
• Gold plated contacts
• DDR400 speed grade supported
• Lead-free


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