datasheetbank_Logo
전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크
HOME  >>>  Intersil  >>> HCTS04D PDF

HCTS04D 데이터시트 - Intersil

HCTS04D image

부품명
HCTS04D

Other PDF
  no available.

PDF
DOWNLOAD     

page
9 Pages

File Size
49 kB

제조사
Intersil
Intersil Intersil

Description
The Intersil HCTS04MS is a Radiation Hardened Hex Inverter. A logic level on any input forces the output to the opposite logic state.
The HCTS04MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCTS04MS is supplied in a 14 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix).


FEATUREs
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ)
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55°C to +125°C
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• LSTTL Input Compatibility
    - VIL = 0.8V Max
    - VIH = VCC/2
• Input Current Levels Ii ≤ 5µA at VOL, VOH

Page Link's: 1  2  3  4  5  6  7  8  9 

부품명
상세내역
PDF
제조사
Radiation Hardened Hex Inverter
Intersil
Radiation Hardened Hex Inverter
Intersil
Radiation Hardened Hex Inverter
Renesas Electronics
Radiation Hardened Hex Inverter
Intersil
Radiation Hardened Hex Inverter with Open Drain
Intersil
Radiation Hardened Hex Inverter with Open Drain Outputs
Intersil
Radiation Hardened HEX Inverting Schmitt Trigger ( Rev : 1995 )
Intersil
Radiation Hardened Hex Inverting Schmitt Trigger
Intersil
Radiation Hardened HEX Inverting Schmitt Trigger
Intersil
Radiation Hardened HEX Inverting Schmitt Trigger
Intersil

Share Link: GO URL

EnglishEnglish Chinese简体中文 Japanese日本語 Russianрусский Spanishespañol

All Rights Reserved© datasheetbank.com  [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]