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DSPIC33FJ32GP202(2007) 데이터시트 - Microchip Technology

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DSPIC33FJ32GP202

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252 Pages

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3.7 MB

제조사
Microchip
Microchip Technology Microchip

Operating Range:
• Up to 40 MIPS operation (@ 3.0-3.6V):
   - Industrial temperature range (-40°C to +85°C)
   - Extended temperature range (-40°C to +125°C)
• Up to 20 MIPS operation (@ 3.0-3.6V):
   - High temperature range (-40°C to +150°C)

High-Performance DSC CPU:
• Modified Harvard architecture
• C compiler optimized instruction set
• 16-bit wide data path
• 24-bit wide instructions
• Linear program memory addressing up to 4M
   instruction words
• Linear data memory addressing up to 64 Kbytes
• 83 base instructions, mostly one word/one cycle
• Sixteen 16-bit General Purpose Registers
• Two 40-bit accumulators with rounding and
   saturation options
• Flexible and powerful addressing modes:
   - Indirect
   - Modulo
   - Bit-Reversed
• Software stack
• 16 x 16 fractional/integer multiply operations
• 32/16 and 16/16 divide operations
• Single-cycle multiply and accumulate:
   - Accumulator write back for DSP operations
   - Dual data fetch
• Up to ±16-bit shifts for up to 40-bit data

Interrupt Controller:
• 5-cycle latency
• Up to 21 available interrupt sources
• Up to three external interrupts
• Seven programmable priority levels
• Four processor exceptions

On-Chip Flash and SRAM:
• Flash program memory (up to 32 Kbytes)
• Data SRAM (2 Kbytes)
• Boot and General Security for Program Flash

Digital I/O:
• Peripheral Pin Select Functionality
• Up to 35 programmable digital I/O pins
• Wake-up/Interrupt-on-Change for up to 31 pins
• Output pins can drive from 3.0V to 3.6V
• Up to 5.5V output with open drain configuration on
   5V tolerant pins with external pull-up
• 4 mA sink on all I/O pins

System Management:
• Flexible clock options:
   - External, crystal, resonator, internal RC
   - Fully integrated Phase-Locked Loop (PLL)
   - Extremely low jitter PLL
• Power-up Timer
• Oscillator Start-up Timer/Stabilizer
• Watchdog Timer with its own RC oscillator
• Fail-Safe Clock Monitor
• Reset by multiple sources

Power Management:
• On-chip 2.5V voltage regulator
• Switch between clock sources in real time
• Idle, Sleep and Doze modes with fast wake-up

Timers/Capture/Compare:
• Timer/Counters, up to three 16-bit timers:
   - Can pair up to make one 32-bit timer
   - One timer runs as Real-Time Clock with
      external 32.768 kHz oscillator
   - Programmable prescaler
• Input Capture (up to four channels):
   - Capture on up, down or both edges
   - 16-bit capture input functions
   - 4-deep FIFO on each capture
• Output Compare (up to 2 channels):
   - Single or Dual 16-bit Compare mode
   - 16-bit Glitchless PWM Mode

Communication Modules:
• 4-wire SPI:
   - Framing supports I/O interface to simple
      codecs
   - Supports 8-bit and 16-bit data
   - Supports all serial clock formats and
      sampling modes
• I2C™:
   - Full Multi-Master Slave mode support
   - 7-bit and 10-bit addressing
   - Bus collision detection and arbitration
   - Integrated signal conditioning
   - Slave address masking
• UART:
   - Interrupt on address bit detect
   - Interrupt on UART error
   - Wake-up on Start bit from Sleep mode
   - 4-character TX and RX FIFO buffers
   - LIN bus support
   - IrDA® encoding and decoding in hardware
   - High-Speed Baud mode
   - Hardware Flow Control with CTS and RTS

Analog-to-Digital Converters (ADCs):
• 10-bit, 1.1 Msps or 12-bit, 500 ksps conversion:
   - Two and four simultaneous samples (10-bit ADC)
   - Up to 13 input channels with auto-scanning
   - Conversion start can be manual or
      synchronized with one of four trigger sources
   - Conversion possible in Sleep mode
   - ±2 LSb max integral nonlinearity
   - ±1 LSb max differential nonlinearity

CMOS Flash Technology:
• Low-power, high-speed Flash technology
• Fully static design
• 3.3V (±10%) operating voltage
• Industrial and extended temperature
• Low-power consumption

Packaging:
• 28-pin SPDIP/SOIC/SSOP/QFN-S
• 44-pin QFN/TQFP

Page Link's: 1  2  3  4  5  6  7  8  9  10  More Pages 

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