Functional Description
The CY7C1345G is a 128K x 36 synchronous cache RAM designed to interface with high speed microprocessors with minimum glue logic. The maximum access delay from clock rise is 6.5 ns (133 MHz version). A two-bit on-chip counter captures the first address in a burst and increments the address automatically for the rest of the burst access.

FEATUREs
■ 128K x 36 common IO
■ 3.3V core power supply (VDD)
■ 2.5V or 3.3V IO supply (VDDQ)
■ Fast clock-to-output times
    ❐ 6.5 ns (133 MHz version)
■ Provide high performance 2-1-1-1 access rate
■ User selectable burst counter supporting Intel Pentium interleaved or linear burst sequences
■ Separate processor and controller address strobes
■ Synchronous self-timed write
■ Asynchronous output enable
■ Available in Pb-free 100-Pin TQFP package, Pb-free and non-Pb-free 119-Ball BGA package
■ ZZ Sleep Mode option