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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크
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CY7C0430CV 데이터시트 - Cypress Semiconductor

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CY7C0430CV

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Cypress
Cypress Semiconductor Cypress

Functional Description
The Quadport Datapath Switching Element (DSE) family offers four ports that may be clocked at independent frequencies from one another. Each port can read or write up to 133 MHz[1], giving the device up to 10 Gb/s of data throughput. The device is 1-Mb (64K × 18) in density. Simultaneous reads are allowed for accesses to the same address location; however, simultaneous reading and writing to the same address is not allowed. Any port can write to a certain location while other ports are reading that location simultaneously, if the timing spec for port to port delay (tCCS) is met. The result of writing to the same location by more than one port at the same time is undefined.


FEATUREs
• QuadPort™ datapath switching element (DSE) family allows four independent ports of access for data path management and switching
• High-bandwidth data throughput up to 10 Gb/s
• 133-MHz[1] port speed x 18-bit-wide interface × 4 ports
• High-speed clock to data access 4.2 ns (max.)
• Synchronous pipelined device
   — 1-Mb (64K × 18) switch array
• 0.25-micron CMOS for optimum speed/power
• IEEE 1149.1 JTAG boundary scan
• Width and depth expansion capabilities
• BIST (Built-In Self-Test) controller
• Dual Chip Enables on all ports for easy depth expansion
• Separate upper-byte and lower-byte controls on all ports
• Simple array partitioning
   — Internal mask register controls counter wrap-around
   — Counter-Interrupt flags to indicate wrap-around
   — Counter and mask registers readback on address
• 272-ball BGA package (27-mm × 27-mm × 1.27-mm ball pitch)
• Commercial and industrial temperature ranges
• 3.3V low operating power
   — Active = 750 mA (maximum)
   — Standby = 15 mA (maximum

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제조사
10 Gb/s 3.3V QuadPort™ DSE Family ( Rev : 2006 )
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